초록 ▼

It is described a low ohmic Through Wafer Interconnection (TWI) for electronic chips formed on a semiconductor substrate (600). The TWI comprises a first connection extending between a front surface and a back surface of the substrate (600). The first connection (610) comprises a through hole filled

It is described a low ohmic Through Wafer Interconnection (TWI) for electronic chips formed on a semiconductor substrate (600). The TWI comprises a first connection extending between a front surface and a back surface of the substrate (600). The first connection (610) comprises a through hole filled with a low ohmic material having a specific resistivity lower than poly silicon. The TWI further comprises a second connection (615) also extending between the front surface and the back surface. The second connection (615) is spatially separated from the first connection (610) by at least a portion of the semiconductor substrate (600). The front surface is provided with a integrated circuit arrangement (620) wherein the first connection (610) is electrically coupled to at least one node of the integrated circuit arrangement (620) without penetrating the integrated circuit arrangement (620). During processing the TWI the through hole may be filled first with a non-metallic material, e.g. poly silicon. After forming integrated components (620) on top of the front surface the substrate (600) may be thinned and the non-metallic material may be substituted with the low ohmic material, which is in particular a metallic material.

대표청구항 ▼

1. A semiconductor carrier structure comprising: a semiconductor substrate having a front surface and an opposing back surface, wherein the front surface is provided with an integrated circuit arrangement;a first connection extending between the front surface and the back surface, wherein the first

1. A semiconductor carrier structure comprising: a semiconductor substrate having a front surface and an opposing back surface, wherein the front surface is provided with an integrated circuit arrangement;a first connection extending between the front surface and the back surface, wherein the first connection comprises a through hole filled with a low ohmic material having a specific resistivity lower than poly silicon, surrounds a portion of the semiconductor substrate, and is electrically coupled to at least one node of the integrated circuit arrangement without penetrating the integrated circuit arrangement;a second connection extending between the front surface and the back surface, wherein the first connection and the second connection are spatially separated from each other by at least a portion of the semiconductor substrate, the second connection is made of doped poly silicon and is a self-contained structure that surrounds the first connection;a solder ball at the back surface;a first contact element between the first connection and the solder ball, wherein the first contact element includes AlSiTi; anda second contract element between the first connection and the solder ball, wherein the second contact element includes NiAu. 2. The semiconductor carrier structure according to claim 1, wherein the low ohmic material is a metallic material. 3. The semiconductor carrier structure according to claim 1, wherein the low ohmic material is a non-metallic filling material. 4. The semiconductor carrier structure according to claim 3, wherein the non-metallic filling material is doped poly silicon that has a specific resistivity lower than poly silicon. 5. The semiconductor carrier structure according to claim 1, wherein the first connection exhibits the shape of a first gap. 6. The semiconductor carrier structure according to claim 5, wherein the first gap is a first self-contained structure. 7. The semiconductor carrier structure according to claim 6, wherein the first self-contained structure exhibits the shape of a first cylindrical ring having a predetermined wall thickness. 8. The semiconductor carrier structure according to claim 1, wherein the second connection exhibits a second self-contained structure having the shape of a second gap 9. The semiconductor carrier structure according to claim 8, wherein the second self-contained structure exhibits the shape of a second cylindrical ring having a predetermined wall thickness. 10. The semiconductor carrier structure according to claim 1, wherein lateral walls of the first connection and/or lateral walls of the second connection comprise an insulating coating. 11. The semiconductor carrier structure according to claim 1, wherein in between the front surface and the integrated circuit arrangement there is formed an insulating layer pierced by the electrically conductive connection. 12. A method for fabricating a semiconductor carrier structure comprising a first connection and a second connection extending between a front surface and a back surface of a semiconductor substrate, the method comprising the steps of: forming, beginning from the front surface, a first trench and a second trench in the semiconductor substrate, wherein each trench has a predetermined minimum depth and both trenches are spatially separated from each other by at least a portion of the semiconductor substrate, wherein the second trench is a self-contained structure that surrounds the first trench;filling the first trench and the second trench with a non-metallic filling material;forming an integrated circuit arrangement at the front surface;thinning the semiconductor substrate starting from the back surface in such a manner that the backside ends of the filled trenches are uncovered and the first trench represents the first connection and the second trench represents the second connection, respectively;removing the non-metallic filling material within the first trench at least partially;filling the first trench with a low ohmic material having a specific resistivity lower than poly silicon in such a manner that the first connection is electrically coupled to at least one node of the integrated circuit arrangement without penetrating the integrated circuit arrangements;partially removing the non-metallic filling material from the second trench;filling the second trench with a doped poly silicon;attaching a first contact element to the filled first trench at the back surface of the semiconductor substrate;attaching a second contact element to the filled first trench at the back surface of the semiconductor substrate; andattaching a solder ball to the first contact element and the second contact element, wherein the first contact element and the second contact element are between the filled first trench and the solder ball. 13. The method according to claim 12, wherein the low ohmic material is a metallic material. 14. The method according to claim 12, wherein before filling the first trench with the low ohmic material, the method further comprises the step of providing at least one inner wall of the first trench with an insulating coating. 15. The method according to claim 12, wherein before filling the second trench with the filling material, the method further comprises the step of providing at least one inner wall of the second trench with an insulating coating. 16. The method according to claim 12, wherein after filling the first trench with the non-metallic filling material and before removing the non-metallic filling material from the first trench at least partially, the method further comprises the step of polishing at least the front surface of the semiconductor substrate. 17. The method according to claim 12, further comprising the step of providing an electric contact to the first connection at the back surface of the semiconductor substrate. 18. The method according to claim 12, further comprising the step of forming a plurality of first connections and a plurality of second connections each extending between the front surface and the back surface of the semiconductor substrate. 19. The method according to claim 18, further comprising the step of forming at the front surface a plurality of optical elements being arranged in a two dimensional array wherein each optical element is electrically coupled with at least one first connection. 20. The method according to claim 19, wherein the optical elements are optical sender elements or optical detector elements. 21. The method according to claim 12, wherein the first contact element includes AlSiTi. 22. The method according to claim 12, wherein the second contact element includes NiAu.