IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0810709
(2007-06-06)
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등록번호 |
US-8636458
(2014-01-28)
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발명자
/ 주소 |
- Auer-Jongepier, Suzan L.
- Onvlee, Johannes
- Bartray, Petrus R.
- Luttikhuis, Bernardus A. J.
- Plug, Reinder T.
- Segers, Hubert M.
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출원인 / 주소 |
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대리인 / 주소 |
Sterne, Kessler, Goldstein & Fox P.L.L.C.
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인용정보 |
피인용 횟수 :
0 인용 특허 :
13 |
초록
▼
Systems and methods for processing wafers, a combined post expose bake and chill unit, and an interface are disclosed. An exemplary system includes a lithography tool, local track, transfer device, transfer device handler, interface unit, and controller to schedule processing. An exemplary combined
Systems and methods for processing wafers, a combined post expose bake and chill unit, and an interface are disclosed. An exemplary system includes a lithography tool, local track, transfer device, transfer device handler, interface unit, and controller to schedule processing. An exemplary combined post expose bake and chill unit includes an enclosure having an opening in its side, and a bake unit and a chill unit in the enclosure. An exemplary interface includes a plurality of enclosures arranged around robot(s) that transfer wafers among the enclosures, one of the plurality of enclosures being an integrated bake and chill unit.
대표청구항
▼
1. A wafer processing system comprising: a lithography tool;a local track connected with the lithography tool;a transfer device handler configured and arranged to handle a transfer device and transfer wafers from and to the transfer device;an interface unit configured and arranged to transfer wafers
1. A wafer processing system comprising: a lithography tool;a local track connected with the lithography tool;a transfer device handler configured and arranged to handle a transfer device and transfer wafers from and to the transfer device;an interface unit configured and arranged to transfer wafers between one or more of the transfer device and the lithography tool, the lithography tool and the local track, and the local track and transfer device, wherein the interface unit comprises: a plurality of processing units each having a first side with an access opening, arranged about a common fixed axis such that the first side of each unit faces the axis, wherein each of the processing units comprise one or more of: a soak unit, a post expose bake unit, a post expose bake and chill unit, and an input/output buffer, and wherein the plurality of processing units are densely arranged with portions of some units positioned behind other units while allowing access to all openings; andtwo or more robots centrally located with respect to, and external to, the plurality of processing units and configured to move vertically on respective guides co-located along a single, common, axis that is permanently fixed relative to the plurality of processing units;a distant track separated from the lithography tool and the local track, wherein the transfer device handler is configured to transfer wafers between the distant track and the local track; anda controller configured and arranged to schedule processing by the lithography tool, local track, distant track, interface unit and transfer device handler, such that the local track is used for time critical processes and the distant track is used for non-critical processes, wherein the length of time that elapses before the wafer begins the non-critical process does not affect the outcome of the non-critical process. 2. The wafer processing system of claim 1, wherein the transfer device handler is configured and arranged to handle the transfer device manually or automatically. 3. The wafer processing system of claim 1, wherein the local track is configured and arranged to perform processing including any of temperature stabilization, inspection, dry (after expose), post expose bake, chill, develop and combinations thereof. 4. The wafer processing system of claim 1, wherein the interface unit connects the lithography tool to the local track. 5. The wafer processing system of claim 1, wherein the interface unit connects the transfer device handler to one or more from either or both of the lithography tool and the local track. 6. The wafer processing system of claim 1, wherein the interface unit is to connect the local track with either or both of the lithography tool and interface. 7. The wafer processing system of claim 1, wherein the transfer device is a Front Opening Unified Pod (FOUP), open cassette or Standard Mechanical Interface (SMIF) pod. 8. A method for processing wars comprising: providing an interface unit comprising: a plurality of processing units each having a first side with an access opening, arranged about a common fixed axis such that the first side of each unit faces the axis, wherein each of the processing units comprise one or more of; a soak unit, a post expose bake unit, a post expose bake and chill unit, and an input/output buffer, and wherein the plurality of processing units are densely arranged with portions of some units positioned behind other units while allowing access to all openings; andtwo or more robots centrally located with respect to, and external to, the plurality of processing units and configured to move vertically on respective guides co-located along a single, common, axis that is permanently fixed relative to the plurality of processing units;transferring a wafer between a transfer device and a lithography tool;transferring the wafer between the lithography tool and a local track connected to the lithography tool to perform time critical processes and transferring the wafer between the lithography tool and a distant track separate from the lithography tool to perform non-critical processes, wherein the length of time that elapses before the wafer begins the non-critical process does not affect the outcome of the non-critical process; andtransferring, using an interface unit, the wafer between the local track and the transfer device or the distant track. 9. The method of claim 8, further comprising one or more selected from the group consisting of stabilizing a temperature of the wafer, drying (after expose) the wafer, post expose baking, chilling, developing, cleaning and inspection in the local track. 10. The method of claim 8, further comprising scheduling the transfer and processing of the wafer. 11. A processing unit that is part of an interface unit and is a combined post expose bake and chill unit, comprising: first and second opposing sides having a first length, and third and fourth opposing sides having a second length, the first length being greater than the second length, and further comprising an opening in the first opposing side to receive a wafer;a bake unit internally located within the processing unit;a chill unit internally located within the processing unit; anda robot internally located within the processing unit and configured to transfer the wafer between the bake unit and the chill unit,wherein the processing unit is part of an interface unit comprising: a plurality of processing units each having a first side with an access opening, arranged about a common fixed axis such that the first side of each unit faces the axis, wherein each of the processing units comprise one or more of: a soak unit, a post expose bake unit, a post expose bake and chill unit, and an input/output buffer, and wherein the plurality of processing units are densely arranged with portions of some units positioned behind other units while allowing access to all openings; andtwo or more robots centrally located with respect to, and external to, the plurality of processing units and configured to move vertically on respective guides co-located along a single, common, axis that is permanently fixed relative to the plurality of processing units. 12. The processing unit of claim 11, wherein the chill unit comprises at least one gripper. 13. The processing unit of claim 11, wherein the bake unit is isolated within the processing unit. 14. The processing unit of claim 11, further comprising at least one additional robot in the processing unit to transfer the wafer within the enclosure. 15. The processing unit of claim 11, further comprising a transfer device in the processing unit to transfer the wafer within the processing unit. 16. An interface for a wafer processing system comprising: a plurality of processing units each having a first side with an access opening, arranged about a common fixed axis such that the first side of each unit faces the axis, wherein each of the processing units comprise one or more of: a soak unit, a post expose bake unit, a post expose bake and chill unit, and an input/output buffer, and wherein the plurality of processing units al e densely arranged with portions of some units positioned behind other units while allowing access to all openings;two or more robots centrally located with respect to, and external to, the plurality of processing units and configured to move vertically on respective guides co-located along a single, common, axis that is permanently fixed relative to the plurality of processing units; andwherein one of the plurality of processing units comprises: an integrated bake unit,an integrated chill unit, anda, robot internally located within the processing unit and configured to transfer a wafer between the integrated bake unit and the integrated chill unit. 17. The interface of claim 16, wherein at least one of the plurality of processing units is a soak unit. 18. The interface of claim 17, wherein the two or more robots transfer the wafers between the lithographic tool, the soak unit and the one of the plurality of processing units. 19. The interface of claim 16, wherein the two or more robots collect one or more wafers from a lithographic tool and transfers the one or more wafers to the one of the plurality of processing units. 20. The interface of claim 16, further comprising a plurality of second processing units arranged around at least one of the two or more robots, each second processing unit having first and second opposing sides having a first length, and third and fourth opposing sides having a second length, the first length being greater than the second length, each second processing unit having an opening in the third opposing side to receive a wafer, the opening facing the two or more robots. 21. The interface of claim 16, further comprising a separate robot to transfer wafers from an external interface connected to the integrated track to an exposure unit.
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