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A code generation system comprises a model analyzer configured to identify data dependencies in a data flow diagram that describes functional behavior of an application, wherein the model analyzer is further configured to compute a data and computation map based on the data dependencies and to compu

A code generation system comprises a model analyzer configured to identify data dependencies in a data flow diagram that describes functional behavior of an application, wherein the model analyzer is further configured to compute a data and computation map based on the data dependencies and to compute one or more implementation constraints; a model partitioner configured to compute one or more partition boundaries based on the data and computation map and the one or more implementation constraints; and a code generator configured to generate parallelized code based on the data flow diagram, the one or more implementation constraints, and the one or more partition boundaries, wherein the code generator is configured to map the code corresponding to each partition defined by the one or more partition boundaries to one of a plurality of cores of a multi-core processor, and to generate inter-core communication code for at least one line of the data and computation map crossed by the one or more partition boundaries.

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1. A code generation system, the system comprising: a memory configured to store model analyzer instructions, model partitioner instructions, and code generator instructions;a processing unit configured to execute the model analyzer instructions to implement a model analyzer, to execute the model pa

1. A code generation system, the system comprising: a memory configured to store model analyzer instructions, model partitioner instructions, and code generator instructions;a processing unit configured to execute the model analyzer instructions to implement a model analyzer, to execute the model partitioner instructions to implement a model partitioner, and to execute the code generator instructions to implement a code generator; andat least one user input element configured to provide data received from a user to the processing unit;wherein the model analyzer is configured to identify data dependencies in a non-executable data flow diagram that describes functional behavior of an application, wherein the model analyzer is further configured to compute a data and computation map based on the data dependencies and to compute one or more implementation constraints;wherein the data flow diagram comprises a plurality of functional blocks and the data and computation map depicts data inputs/outputs of and computations performed by each of the functional blocks without explicit reference to the corresponding functional blocks;wherein the model partitioner is configured to compute one or more partition boundaries based on the data and computation map and the one or more implementation constraints; andwherein the code generator is configured to generate executable parallelized code based on the data flow diagram, the one or more implementation constraints, and the one or more partition boundaries, wherein the code generator is configured to map the code corresponding to each partition defined by the one or more partition boundaries to one of a plurality of cores of a multi-core processor, and to generate inter-core communication code for at least one line of the data and computation map crossed by the one or more partition boundaries. 2. The code generation system of claim 1, wherein the model partitioner is further configured to compute the one or more partition boundaries based on the one or more implementation constraints such that a number of computations in each partition defined by the one or more partition boundaries is approximately equal across implementation constraints. 3. The code generation system of claim 1, wherein the model analyzer is configured to minimize the number of implementation constraints computed. 4. The code generation system of claim 1, wherein the code generator is further configured to generate code for one or more state variables that persist from one execution frame to the next based on the one or more implementation constraints. 5. The code generation system of claim 1, wherein the code generator is further configured to generate code by directly calling one or more library function based on one or more implementation constraints. 6. The code generation system of claim 1, wherein the data and computation map comprises a plurality of lines; and wherein the model partitioner is further configured to compute the one or more partition boundaries such that a minimum number of lines in the data and computation map are crossed by the one or more partition boundaries. 7. The code generation system of claim 1, wherein the model analyzer is further configured to verify the functional correctness of the parallelized code generated by the code generator. 8. The code generation system of claim 7, further comprising: a test harness;wherein the model analyzer is further configured to generate one or more tests of functional correctness to verify the functional correctness of the parallelized code generated by the code generator;wherein the test harness is configured to perform the one or more tests of functional correctness on the parallelized code and to output a report of results of the one or more performed tests of functional correctness. 9. A program product comprising a non-transitory processor-readable medium on which program instructions are embodied, wherein the program instructions are configured, when executed by at least one programmable processor, to cause the at least one programmable processor to: determine data dependencies in a non-executable data flow diagram that describes functional behavior of an application, the data flow diagram comprising a plurality of functional blocks;compute a data and computation map based on the data dependencies, the data and computation map depicting data inputs/outputs of and computations performed by each of the functional blocks without explicit reference to the corresponding functional blocks;compute one or more implementation constraints; andcompute one or more partition boundaries based on the data and computation map and on the one or more implementation constraints. 10. The program product of claim 9, wherein the program instructions are further configured to cause the at least one programmable processor to: compute the one or more partition boundaries such that a number of computations in each partition defined by the one or more partition boundaries is approximately equal between implementation constraints. 11. The program product of claim 9, wherein the program instructions are further configured to cause the at least one programmable processor to: generate code for one or more state variables that persist from one execution frame to the next based on one or more implementation constraints. 12. The program product of claim 9, wherein the program instructions are further configured to cause the at least one programmable processor to: compute the one or more partition boundaries such that a minimum number of lines in the data and computation map are crossed by the one or more partition boundaries. 13. The program product of claim 9, wherein the program instructions are further configured to cause the at least one programmable processor to: generate code based on the data flow diagram, the one or more implementation constraints, and the one or more partition boundaries;map generated code corresponding to each partition defined by the one or more partition boundaries to one of a plurality of cores of a multi-core processor; andgenerate inter-core communication code for at least one line of the data and computation map crossed by the one or more partition boundaries. 14. The program product of claim 13, wherein the program instructions are further configured to cause the at least one programmable processor to: verify the functional correctness of the code generated by the code generator. 15. The program product of claim 14, wherein the program instructions are further configured to cause the at least one programmable processor to verify the functional correctness of the code generated by the code generator by causing the at least one programmable processor to: generate one or more tests of functional correctness;perform the one or more tests on a test harness; andoutput a report of results of the one or more performed tests. 16. A method of generating parallelized code, the method comprising: receiving user input indicating a number of cores in a multi-core processor;determining data dependencies in a non-executable data flow diagram that describes functional behavior of an application to be executed by the multi-core processor, the data flow diagram comprising a plurality of functional blocks;computing a data and computation map based on the data dependencies, the data and computation map depicting data inputs/outputs of and computations performed by each of the functional blocks without explicit reference to the corresponding functional blocks;computing one or more implementation constraints;computing one or more partition boundaries based on the data and computation map, the one or more implementation constraints, and the number of cores in the multi-core processor; andgenerating executable code based on the data flow diagram, the one or more implementation constraints, and the one or more partition boundaries. 17. The method of claim 16, wherein computing the one or more implementation constraints further comprises determining one or more state variables that persist from one execution frame to the next. 18. The method of claim 16, wherein computing the one or more partition boundaries further comprises computing the one or more partition boundaries such that a minimum number of lines in the data and computation map are crossed by the one or more partition boundaries. 19. The method of claim 16, wherein computing one or more partition boundaries comprises computing one or more partition boundaries such that a number of computations in each partition defined by the one or more partition boundaries is approximately equal between implementation constraints. 20. The method of claim 16, further comprising: generating one or more tests for the generated code;testing the generated code based on the generated tests; andoutputting a report based on the tests of the generated code.