초록 ▼

A multi-core microprocessor provides an indication of the power management state of each of the cores on output terminals. Cooling of the cores is adjusted responsive to the indication of the power management state of the respective cores with additional cooling being provided to those cores in a mo

A multi-core microprocessor provides an indication of the power management state of each of the cores on output terminals. Cooling of the cores is adjusted responsive to the indication of the power management state of the respective cores with additional cooling being provided to those cores in a more active state and less cooling provided to those cores in a less active state.

대표청구항 ▼

1. A method comprising: providing at one or more output terminals of an integrated circuit power management state indications of respective regions of the integrated circuit, the power management state indications being states associated with a power management protocol used by the integrated circui

1. A method comprising: providing at one or more output terminals of an integrated circuit power management state indications of respective regions of the integrated circuit, the power management state indications being states associated with a power management protocol used by the integrated circuit; andin response to a change in one or more of the power management state indications, adjusting cooling of at least one of a plurality of thermal energy removal systems respective associated with one of the respective regions, the adjusting causing at least one of the respective regions to have different cooling than another of the respective regions. 2. The method as recited in claim 1 wherein the power management state indications are Advanced Configuration and Power Interface (ACPI) power states. 3. The method as recited in claim 1 wherein the power management state indications do not include temperature, voltage, or frequency measurements. 4. The method as recited in claim 1 further comprising: determining a thermal cooling budget associated with the respective regions; andbased on the power management state indications, allocating the thermal cooling budget between the respective regions. 5. The method as recited in claim 4 wherein allocating the thermal cooling budget includes reallocating a portion of the thermal cooling budget from a first region of the respective regions to a second region of the respective regions. 6. An apparatus comprising: an integrated circuit including multiple regions; anda plurality of sets of one or more output terminals of the integrated circuit, wherein the integrated circuit is configured to provide at respective ones of the plurality of sets of one or more output terminals respective power management state indications, each of the power management state indications corresponding to a respective one of the multiple regions, the power management state indications being states associated with a power management protocol used by the integrated circuit; anda thermal energy removal system configured to independently cool respective ones of the multiple regions responsive to the power management state indications, wherein in respond to a first and second of the power management state indications indicating a first of the regions is in a more active power management state than a second of the regions is in a more active power management state than a second of the regions, the thermal energy removal system is responsive to provide increased thermal energy removal capability for the first of the regions as compared to the second of the regions. 7. The apparatus as recited in claim 6 wherein the power management state indications are Advanced Configuration and Power Interface (ACPI) power states. 8. The apparatus as recited in claim 6 wherein the power management state indications do not include temperature, voltage, or frequency measurements. 9. The apparatus as recited in claim 6 wherein each of the plurality of sets of one or more output terminals include multiple groups of output terminals, each of the multiple groups of output terminals coupled to provide a respective one of the power management state indications. 10. The apparatus as recited in claim 6 wherein the multiple regions are processing cores of the integrated circuit. 11. The apparatus as recited in claim 6 further comprising a power management controller configured to interface with the thermal energy removal system, which includes a plurality energy removal device, by providing the power management state indications to the thermal energy removal system. 12. The apparatus as recited in claim 6 wherein the thermal energy removal system includes multiple fans configured to cool respective ones of the multiple regions by operating at speeds based on the power management state indications. 13. The apparatus as recited in claim 6 wherein the thermal energy removal system includes a liquid cooling system configured to provide cooling fluid flow to respective ones of the multiple regions based on the power management state indications. 14. The apparatus as recited in claim 13 further comprising a pump and multiple valves in fluid communication with the pump, the multiple valves operable to regulate the cooling fluid flow to respective ones of the multiple regions based on the power management state indications. 15. The apparatus as recited in claim 6 wherein the thermal energy removal system includes Peltier cooling devices. 16. A method comprising: receiving a first indication of a first power management state associated with operation of a first region of an integrated circuit;receiving a second indication of a second power management state associated with operation of a second region of the integrated circuit; andbased on the first and second indications, allocating different respective first and second portions of a thermal cooling budget to the first and second regions;wherein the first and second power management state indication are states associated with the power management protocol used by the integrated circuit; andwherein the first and second power management state indications are received via one or more output terminal of the integrated circuit.