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A temperature sensor circuit and system providing accurate digital temperature readings using a local or remote temperature diode. In one set of embodiments a change in diode junction voltage (ΔVBE) proportional to the temperature of the diode is captured and provided to an analog to digital convert

A temperature sensor circuit and system providing accurate digital temperature readings using a local or remote temperature diode. In one set of embodiments a change in diode junction voltage (ΔVBE) proportional to the temperature of the diode is captured and provided to an analog to digital converter (ADC), which may perform required signal conditioning functions on ΔVBE, and provide a digital output corresponding to the temperature of the diode. DC components of errors in the measured temperature that may result from EMI noise modulating the junction voltage (VBE) may be minimized through the use of a front-end sample-and-hold circuit coupled between the diode and the ADC, in combination with a shunt capacitor coupled across the diode junction. The sample-and-hold-circuit may sample VBE at a frequency that provides sufficient settling time for each VBE sample, and provide corresponding stable ΔVBE samples to the ADC at the ADC operating frequency. The ADC may therefore be operated at its preferred sampling frequency rate without incurring reading errors while still averaging out AC components of additional errors induced by sources other than EMI.

대표청구항 ▼

1. A method comprising: sampling output signals generated by a semiconductor device having a specified, substantially non-linear input-output characteristic that varies with temperature and being subject to effects of electromagnetic interference (EMI), wherein said sampling comprises obtaining the

1. A method comprising: sampling output signals generated by a semiconductor device having a specified, substantially non-linear input-output characteristic that varies with temperature and being subject to effects of electromagnetic interference (EMI), wherein said sampling comprises obtaining the output signals at a pair of output terminals of the semiconductor device;generating specified signals from the output signals;successively providing each respective one of the specified signals to a converter circuit, comprising providing each respective one of the specified signals for a respective specified time period that is longer than a sampling period of the converter circuit; andthe converter circuit receiving the specified signals, averaging the received specified signals, and producing a numeric value based on the averaged received specified signals, wherein the numeric value corresponds to a temperature of the semiconductor device. 2. The method of claim 1, wherein said generating the specified signals comprises generating each subsequent respective one of the specified signals during the respective specified time period when a previously generated respective one of the specified signals is provided to the converter circuit. 3. The method of claim 1, further comprising successively providing to the semiconductor device during each respective specified time period at least a first input signal and a second input signal that differ in magnitude, wherein the output signals comprise a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal; wherein the first output signal has a first settling time and the second output signal has a second settling time. 4. The method of claim 3, wherein the first input signal and the second input signal comprise current signals, wherein the semiconductor device comprises a base-emitter junction, wherein each of the output signals is a base-emitter voltage (VBE) signal developed across the base-emitter junction, and wherein each of the specified signals is a voltage difference between two successive VBE signals (ΔVBE). 5. The method of claim 4, wherein the base-emitter junction is comprised in one of: a diode; anda BJT. 6. The method of claim 1, wherein the semiconductor device is one of: a diode; anda BJT;wherein the output signals are VBE signals, and wherein the specified signals are ΔVBE signals. 7. The method of claim 1, wherein the converter circuit is an analog to digital converter (ADC). 8. The method of claim 7, wherein the ADC is a delta-sigma ADC comprising a switched capacitor integrator configured to perform said averaging the received specified signals. 9. The method of claim 1, further comprising: providing to the converter circuit an inverse of the respective one of the specified signals during each specified time period. 10. The method of claim 9, further comprising: alternately providing the respective one of the specified signals and the inverse of the respective one of the specified signals to the converter circuit during the respective specified time period. 11. A system comprising: a sampler circuit having input terminals and output terminals, wherein the input terminals are configured to couple to corresponding terminals of a semiconductor device, the semiconductor device having a specified, substantially non-linear input-output characteristic that varies with temperature and being subject to effects of electromagnetic interference (EMI); anda converter circuit configured to operate at a first frequency and having input ports configured to couple to the output terminals of the sampler circuit;wherein the sampler circuit is configured to sample output signals generated by the semiconductor device and generate samples corresponding to the output signals,wherein the sampler circuit is configured to provide to the converter circuit each respective one of the samples for a specified time period that is longer than a period corresponding to the first frequency;wherein the converter circuit is configured to receive the samples from the sampler circuit, and produce a numeric value based on an average of the received samples, wherein the numeric value corresponds to a temperature of the semiconductor device. 12. The system of claim 11, wherein the sampler circuit comprises a pair of operational amplifiers (op-amps); wherein the input terminals of the sampler circuit are configured to couple respective inputs of each op-amp to the corresponding terminals of the semiconductor device, and the output terminals are configured to couple respective outputs of each op-amp to the input ports of the converter circuit; andwherein one of the op-amps is configured to generate, during each specified time period, a next respective one of the samples concurrently with the other op-amp providing to the converter circuit an existent respective one of the samples generated during an immediately preceding specified time period. 13. The system of claim 11, further comprising one or more input devices configured to successively provide to the semiconductor device, during each specified time period, at least a first input signal and a second input signal that differ in magnitude, wherein the output signals comprise a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal; wherein the first output signal has a first settling time and the second output signal has a second settling time. 14. The system of claim 13, wherein the one or more input devices comprise one or more current sources, wherein the first input signal and the second input signal comprise current signals, wherein the semiconductor device comprises a base-emitter junction, wherein each of the output signals is a base-emitter voltage signal developed across the base-emitter junction, and wherein each of the samples is a voltage difference between two successive base-emitter voltage signals. 15. The system of claim 14, wherein the base-emitter junction is comprised in one of: a diode; anda bipolar junction transistor (BJT). 16. The system of claim 11, wherein the semiconductor device is one of: a diode; anda BJT;wherein the output signals are base-emitter voltage signals, and wherein the samples are voltage difference signals derived from a voltage difference between two successive base-emitter voltage signals. 17. The system of claim 11, wherein the converter circuit is an analog to digital converter (ADC). 18. The system of claim 17, wherein the ADC is a delta-sigma ADC comprising a switched capacitor integrator configured to generate the average of the received samples. 19. The system of claim 11, wherein the sampler circuit is configured to provide to the converter circuit, during each specified time period, an inverse of the respective one of the samples. 20. The system of claim 19, wherein the sampler circuit is configured to alternately provide to the converter circuit, during each specified time period, the respective one of the specified signals and the inverse of the respective one of the specified signals.