An under-bump metallization (UBM) structure for a substrate, such as an organic substrate, a ceramic substrate, a silicon or glass interposer, a high density interconnect, a printed circuit board, or the like, is provided. A buffer layer is formed over a contact pad on the substrate such that at lea
An under-bump metallization (UBM) structure for a substrate, such as an organic substrate, a ceramic substrate, a silicon or glass interposer, a high density interconnect, a printed circuit board, or the like, is provided. A buffer layer is formed over a contact pad on the substrate such that at least a portion of the contact pad is exposed. A conductor pad is formed within the opening and extends over at least a portion of the buffer layer. The conductor pad may have a uniform thickness and/or a non-planar surface. The substrate may be attached to another substrate and/or a die.
대표청구항▼
1. A semiconductor structure comprising: an integrated circuit die having a first substrate;a second substrate comprising a first contact pad, a first buffer layer over the first contact pad such that an opening in the first buffer layer exposes at least a portion of the first contact pad, and a fir
1. A semiconductor structure comprising: an integrated circuit die having a first substrate;a second substrate comprising a first contact pad, a first buffer layer over the first contact pad such that an opening in the first buffer layer exposes at least a portion of the first contact pad, and a first conductor pad in electrical contact with the first contact pad, the first conductor pad having a non-planar surface and being formed along sidewalls of the opening and extending over at least a portion of the first buffer layer; anda conductive material interposed between the first substrate and the second substrate, the conductive material being in direct contact with the first conductor pad. 2. The semiconductor structure of claim 1, wherein the first buffer layer comprises a polymer, an epoxy, a polyimide, a solder resist, or a photo-sensitive material. 3. The semiconductor structure of claim 1, further comprising a second buffer layer interposed between the first buffer layer and the first contact pad and a second conductor pad interposed between the first conductor pad and the first contact pad, the second conductor pad extending over a top surface of the second buffer layer. 4. The semiconductor structure of claim 3, wherein the second buffer layer comprises a polymer, an epoxy, a polyimide, a solder resist, or a photo-sensitive material. 5. The semiconductor structure of claim 1, wherein a thickness of the first conductor pad is less than about 10 μm. 6. The semiconductor structure of claim 1, wherein the first conductor pad comprises a composite film. 7. The semiconductor structure of claim 1, wherein the first conductor pad comprises Ta, Ti, Ni, Au, Cu, Al, or an inert metal. 8. The semiconductor structure of claim 1, wherein the second substrate comprises an organic substrate, a high density interconnect, a printed circuit board, or a silicon interposer. 9. A semiconductor structure comprising: a first substrate having a first side and a second side, at least one of the first side and the second side being formed to accept a connection to an integrated circuit die; anda bump stress buffer layer directly on and contacting the first side of the first substrate, the bump stress buffer layer comprising a first bump buffer layer overlying a first electrical contact, the first bump buffer layer having an opening over at least a portion of the first electrical contact, the bump stress buffer layer further comprising a plurality of first bump conductor pads, the first bump conductor pads having a uniform thickness and extending over a top surface of the first bump buffer layer. 10. The semiconductor structure of claim 9, further comprising a second substrate having electrical circuitry formed thereon, the second substrate being electrically connected to the first bump conductor pads of the first substrate using conductive bumps. 11. The semiconductor structure of claim 10, further comprising an underfill material interposed between the first substrate and the second substrate. 12. The semiconductor structure of claim 9, wherein the first bump buffer layer comprises a polymer, an epoxy, a polyimide, a solder resist, or a photo-sensitive material. 13. The semiconductor structure of claim 9, further comprising a second bump buffer layer interposed between the first bump buffer layer and the first electrical contact and a second bump conductor pad interposed between the first bump conductor pad and the first electrical contact, the second bump conductor pad extending over a top surface of the second bump buffer layer. 14. The semiconductor structure of claim 13, wherein the second bump buffer layer comprises a polymer, an epoxy, a polyimide, a solder resist, or a photo-sensitive material. 15. The semiconductor structure of claim 9, wherein a thickness of the first bump conductor pad is less than about 10 μm. 16. A semiconductor structure comprising: a first substrate having a first side and a second side, at least one of the first side and the second side being formed to accept a connection to an integrated circuit die; anda bump stress buffer layer on the first side of the first substrate, the bump stress buffer layer comprising a first bump buffer layer overlying a first electrical contact, the first bump buffer layer having an opening over at least a portion of the first electrical contact, the bump stress buffer layer further comprising a plurality of first bump conductor pads, the first bump conductor pads having a uniform thickness and extending over a top surface of the first bump buffer layer anda ball stress buffer layer on the second side of the first substrate, the ball stress buffer layer comprising a ball buffer layer overlying a second electrical contact, the ball buffer layer having an opening over at least a portion of the second electrical contact, the ball stress buffer layer further comprising a ball conductor pad, the ball conductor pad having a uniform thickness and extending over a top surface of the ball buffer layer. 17. The semiconductor structure of claim 16, wherein the first bump buffer layer comprises a polymer, an epoxy, a polyimide, a solder resist, or a photo-sensitive material. 18. The semiconductor structure of claim 16, further comprising a second bump buffer layer interposed between the first bump buffer layer and the first electrical contact and a second bump conductor pad interposed between the first bump conductor pad and the first electrical contact, the second bump conductor pad extending over a top surface of the second bump buffer layer. 19. The semiconductor structure of claim 18, wherein the second bump buffer layer comprises a polymer, an epoxy, a polyimide, a solder resist, or a photo-sensitive material. 20. The semiconductor structure of claim 16, wherein a thickness of the first bump conductor pad is less than about 10 μm.
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