국가/구분 |
United States(US) Patent
등록
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국제특허분류(IPC7판) |
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출원번호 |
US-0927660
(2013-06-26)
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등록번호 |
US-8709846
(2014-04-29)
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발명자
/ 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
1 인용 특허 :
3 |
초록
▼
Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium galli
Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface.
대표청구항
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1. A method for processing a silicon substrate, comprising: forming a solid state lighting (SSL) structure on a substrate, the substrate having a substrate material with a Si(1,0,0) lattice orientation, wherein the SSL structure includes an N-type gallium nitride (GaN) material, an indium gallium ni
1. A method for processing a silicon substrate, comprising: forming a solid state lighting (SSL) structure on a substrate, the substrate having a substrate material with a Si(1,0,0) lattice orientation, wherein the SSL structure includes an N-type gallium nitride (GaN) material, an indium gallium nitride (InGaN) material, and a P-type GaN material, and wherein at least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface with a plurality of symmetric protrusions extending along a Si(1,1,1) plane, and wherein the symmetric protrusions are formed with tips, and wherein the symmetric protrusions at least partially reduce a total tensile stress among the N-type GaN, InGaN, and P-type GaN materials by at least partially canceling opposite tensile stresses at the tips along the non-planar surface;forming a first contact electrically coupled to the P-type GaN; andforming a second contact electrically coupled to the N-type GaN. 2. The method of claim 1 wherein the non-planar surface has a zigzag pattern. 3. The method of claim 1 wherein the individual protrusions include a first sidewall and a second sidewall joined together at a junction. 4. The method of claim 1 wherein the individual protrusions include a first sidewall and a second sidewall joined together at a junction, the first and second sidewalls forming an angle of about 72°. 5. The method of claim 1 wherein the individual protrusions include a first sidewall, a second sidewall, and a third sidewall extending between the first and second sidewalls, the first and second sidewalls forming an angle of about 54° and 126° with the third sidewall, respectively. 6. The method of claim 1 wherein the N-type GaN, InGaN, and P-type GaN materials each have a generally constant thickness. 7. The method of claim 1 wherein at least one of the N-type GaN, InGaN, and P-type GaN materials have a generally planar surface opposite the non-planar surface. 8. The method of claim 1 wherein forming the SSL structure further comprises: depositing the N-type GaN material, the InGaN material, and the P-type GaN material on the substrate; andcoalescing at least one of the N-type GaN, InGaN, and P-type GaN materials during deposition. 9. A method of manufacturing a microelectronic assembly, comprising: forming a silicon substrate having a surface with a plurality of indentations, the silicon substrate having a Si(1,0,0) lattice orientation at the surface, wherein the indentations are defined by at least one plane with a Si(1,1,1) lattice orientation; andforming a solid-state lighting (SSL) structure carried by the silicon substrate, the SSL structure having an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material between the N-type GaN material and the P-type GaN material, wherein at least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface with a plurality of symmetric protrusions formed with tips, and wherein the symmetric protrusions at least partially reduce a total tensile stress among the N-type GaN, InGaN, and P-type GaN materials by at least partially canceling opposite tensile stresses at the tips along the non-planar surface. 10. The method of claim 9 wherein the individual symmetric protrusions include two adjacent Si(1,1,1) planes intersecting one another at a junction, the junction having an angle of about 72°. 11. The method of claim 9 wherein the individual symmetric protrusions include first and second planes having Si(1,1,1) lattice orientations and a third plane having a Si(1,0,0) lattice orientation, wherein the first and second planes form an angle of about 54° and 126° with the third plane, respectively. 12. The method of claim 9 wherein the plurality of symmetric protrusions are generally conforming to the indentations of the silicon substrate. 13. The method of claim 9 wherein at least one of the N-type GaN, InGaN, and P-type GaN materials includes a planar surface opposite to the non-planar surface. 14. The method of claim 9 wherein the N-type GaN, InGaN, and P-type GaN materials each have a generally constant thickness. 15. The method of claim 9 wherein at least one of the N-type GaN, InGaN, and P-type GaN materials has a non-uniform thickness. 16. A method for processing a silicon substrate, comprising: forming a light emitting diode (LED) structure on a substrate, the substrate having a substrate material with a Si(1,0,0) lattice orientation, wherein forming the LED structure includes depositing an N-type gallium nitride (GaN) material, an indium gallium nitride (InGaN) material, and a P-type GaN in sequence and coalescing at least one of the N-type GaN, InGaN, and P-type GaN materials during deposition, and wherein the coalescing reduces a dislocation density in at least one of the N-type GaN, InGaN, and P-type GaN materials by at least partially canceling opposite tensile stresses along at least one non-planar surface of the N-type GaN, InGaN, and P-type GaN materials;forming a first contact electrically coupled to the P-type GaN; andforming a second contact electrically coupled to the N-type GaN. 17. The method of claim 16 wherein the non-planar surface includes a plurality of symmetric protrusions formed with tips. 18. The method of claim 17 wherein canceling the opposite tensile stresses along at least one non-planar surface includes canceling the opposite tensile stresses at the tips. 19. The method of claim 16 wherein the N-type GaN, InGaN, and P-type GaN materials each have a generally constant thickness. 20. The method of claim 16 wherein at least one of the N-type GaN, InGaN, and P-type GaN materials has a non-uniform thickness.
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