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A method and system for a commutation control circuit are provided. The system includes an integrating voltage counter electrically coupled to an electrical power bus, wherein the integrating voltage counter is configured to integrate over time a voltage signal received from the power bus and to gen

A method and system for a commutation control circuit are provided. The system includes an integrating voltage counter electrically coupled to an electrical power bus, wherein the integrating voltage counter is configured to integrate over time a voltage signal received from the power bus and to generate a trigger signal when the integrated voltage signal equals a predetermined count. The system also includes a plurality of transistor pairs configured to receive a trigger signal generated by the integrating voltage counter and electrically coupled to respective windings of a motor.

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1. A commutation control circuit comprising: an integrating voltage counter electrically coupled to an electrical power bus, said integrating voltage counter configured to integrate over time a voltage signal received from the power bus;a comparator configured to compare the integrated voltage signa

1. A commutation control circuit comprising: an integrating voltage counter electrically coupled to an electrical power bus, said integrating voltage counter configured to integrate over time a voltage signal received from the power bus;a comparator configured to compare the integrated voltage signal to a predetermined threshold and to generate a trigger signal when the integrated voltage signal equals the predetermined threshold; anda plurality of transistor pairs configured to receive a trigger signal generated by said comparator and electrically coupled to respective electrical windings. 2. A commutation circuit in accordance with claim 1, wherein said integrating voltage counter comprises a field programmable gate array (FPGA) device. 3. A commutation circuit in accordance with claim 1, wherein said integrating voltage counter comprises a sigma-delta modulator device. 4. A commutation circuit in accordance with claim 1, wherein the trigger signal is configured to change a state of the plurality of transistor pairs from a first state to a second state. 5. A commutation circuit in accordance with claim 1, wherein said integrating voltage counter is configured to: receive a voltage signal at an input;integrate the voltage signal to produce a pulse train;increment a counter responsive to the pulse train. 6. A commutation circuit in accordance with claim 1, wherein the voltage signal includes a disturbance component, the DC component used to generate a power output of the power converter, the disturbance component causes unwanted stress of physical components of at least one of the power converter and the motor. 7. A commutation circuit in accordance with claim 1, wherein said integrating voltage counter and said comparator are contained in a single programmable device. 8. A commutation circuit in accordance with claim 1, wherein the predetermined count is determined using at least one of a magnitude and phase of an output of said plurality of transistor pairs. 9. A method of commutating a power converter, said method comprising: integrating a voltage signal of at least one of a DC link of the power converter, an input of the power converter, and an output of the power converter that includes a direct current component and a disturbance component to generate an integrated voltage value;comparing the integrated voltage value to a predetermined threshold; andtriggering a commutation of the power converter when the integrated voltage value equals the predetermined threshold. 10. A method in accordance with claim 9, wherein the integrated voltage value comprises volt-seconds. 11. A method in accordance with claim 9, wherein triggering a commutation of the power converter comprises triggering a commutation of the power converter when a counter integrating the voltage signal increments. 12. A method in accordance with claim 9, wherein integrating a voltage signal comprises integrating a voltage that includes disturbances in DC Link voltage and an influence of commutating circuits and power devices. 13. A power converter system comprising: an input assembly including at least one converter;an output assembly including a plurality of transistor pairs electrically coupled to respective motor windings; anda direct current (DC) link electrically coupled between said input assembly and said output assembly;a control unit comprising an integrating voltage counter and configured to:receive a voltage signal from at least one of the DC link and an output of the output assembly;integrate the voltage signal with respect to time to produce a pulse train;increment a counter responsive to the pulse train; andtrigger a change of state of said output assembly using the incrementing of the counter. 14. A system in accordance with claim 13, wherein said integrating voltage counter comprises a field programmable gate array (FPGA) device. 15. A system in accordance with claim 13, wherein said integrating voltage counter comprises a sigma-delta modulator device. 16. A system in accordance with claim 13, wherein said at least one inverter comprises at least one three phase inverter. 17. A system in accordance with claim 13, wherein said respective motor windings are positioned within an electric motor for driving a compressor.