IPC분류정보
국가/구분 |
United States(US) Patent
등록
|
국제특허분류(IPC7판) |
|
출원번호 |
US-0067319
(2011-05-24)
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등록번호 |
US-8742827
(2014-06-03)
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발명자
/ 주소 |
- Van Winkelhoff, Nicolaas Klarinus Johannes
- Brun, Mikael
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 |
피인용 횟수 :
1 인용 특허 :
3 |
초록
▼
A functional circuit is coupled to a power supply conductor by at least one power gating transistor. A switching device applies a gate drive voltage to a gate terminal of the power gating transistor via a resistive element. The power gating transistor provides a Miller capacitance between its drain
A functional circuit is coupled to a power supply conductor by at least one power gating transistor. A switching device applies a gate drive voltage to a gate terminal of the power gating transistor via a resistive element. The power gating transistor provides a Miller capacitance between its drain and gate terminals. The Miller capacitance, the resistance of the resistive element, and the drive strength of the switching device are configured such that, in response to the switching device switching the gate drive voltage to allow more current to pass through the power gating transistor, the Miller capacitance provides a feedback mechanism competing against the switching device to reduce the slew rate of the gate drive voltage such that the current passing between the power gate supply conductor and the functional circuit through the power gating transistor is less than the saturation current of the power gating transistor.
대표청구항
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1. An integrated circuit comprising: a functional circuit;a power supply conductor for said functional circuit;at least one power gating transistor having a source terminal coupled to said power supply conductor, a drain terminal coupled to said functional circuit, and a gate terminal, said at least
1. An integrated circuit comprising: a functional circuit;a power supply conductor for said functional circuit;at least one power gating transistor having a source terminal coupled to said power supply conductor, a drain terminal coupled to said functional circuit, and a gate terminal, said at least one power gating transistor having a saturation current;a switching device coupled to said gate terminal via a resistive element, said switching device being configured to apply a gate drive voltage to said gate terminal via said resistive element, an amount of current passed by said at least one power gating transistor being dependent on said gate drive voltage; wherein:said at least one power gating transistor is configured to provide a Miller capacitance between said drain terminal and said gate terminal; andsaid Miller capacitance, a resistance of said resistive element, and a drive strength of said switching device are configured such that, in response to said switching device switching said gate drive voltage to allow more current to pass through said at least one power gating transistor, said Miller capacitance provides a feedback mechanism competing against said switching device to reduce a slew rate of said gate drive voltage such that said current passing between said power supply conductor and said functional circuit through said at least one power gating transistor is less than said saturation current of said at least one power gating transistor,wherein said switching device comprises a first transistor for pulling said gate drive voltage to a power off level and a second transistor for pulling said gate drive voltage to a power on level, said second transistor having a lower drive strength than said first transistor. 2. The integrated circuit according to claim 1, comprising an additional switching transistor having a greater drive strength than said switching device, said additional switching transistor being configured to apply said gate drive voltage to said gate terminal after said functional circuit is in a substantially powered state. 3. The integrated circuit according to claim 1, wherein said resistive element comprises at least one of metal and polysilicon. 4. The integrated circuit according to claim 1, wherein said resistive element is formed continuously with said gate terminal of said at least one power gating transistor. 5. The integrated circuit according to claim 1, wherein said gate terminal is provided in a first layer of said power gating transistor, said drain terminal is provided in a second layer of said power gating transistor, and said drain terminal overhangs said gate terminal. 6. An integrated circuit comprising: a functional circuit;a power supply conductor for said functional circuit;at least one power gating transistor having a source terminal coupled to said power supply conductor, a drain terminal coupled to said functional circuit, and gate terminal, said at least one power gating transistor having a saturation current;a switching device coupled to said gate terminal via a resistive element, said switching device being configured to apply a gate drive voltage to said gate terminal via said resistive element, an amount of current passed by said at least one power gating transistor being dependent on said gate drive voltage; wherein:said at least one power gating transistor is configured to provide a Miller capacitance between said drain terminal and said gate terminal; andsaid Miller capacitance, a resistance of said resistive element, and a drive strength of said switching device are configured such that, in response to said switching device switching said gate drive voltage to allow more current to pass through said at least one power gating transistor, said Miller capacitance provides a feedback mechanism competing against said switching device to reduce a slew rate of said gate drive voltage such that said current passing between said power supply conductor and said functional circuit through said at least one power gating transistor is less than said saturation current of said at least one power gating transistor,the integrated circuit further comprising a chain of power gating transistors having their gate terminals coupled together, resistive elements being provided between the gate terminals of each successive pair of neighbouring power gating transistors, said switching device being configured to apply said gate drive voltage to the gate terminal of a power gating transistor at a start of said chain and said gate drive voltage propagating to the gate terminals of the other power gating transistors via said resistive elements. 7. A method of powering up a functional circuit using a power supply conductor, at least one power gating transistor and a switching device, said at least one power gating transistor having a source terminal coupled to said power supply conductor, a drain terminal coupled to said functional circuit, and a gate terminal, said at least one power gating transistor having a saturation current and being configured to provide a Miller capacitance between said drain terminal and said gate terminal, said switching device being coupled to said gate terminal via a resistive element and configured to apply a gate drive voltage to said gate terminal via said resistive element, an amount of current passed by said at least one power gating transistor being dependent on said gate drive voltage; said method comprising: using said switching device to switch said gate drive voltage to allow more current to pass through said at least one power gating transistor; andproviding, using said Miller capacitance of said at least one power gating transistor, a feedback mechanism which competes against said switching device to reduce a slew rate of said gate drive voltage such that said current passing between said power supply conductor and said functional circuit through said at least one power gating transistor is less than said saturation current of said at least one power gating transistor. 8. A method of producing an integrated circuit comprising a functional circuit, a power supply conductor for said functional circuit, at least one power gating transistor and a switching device, said at least one power gating transistor having a source terminal coupled to said power supply conductor, a drain terminal coupled to said functional circuit, and a gate terminal, said at least one power gating transistor having a saturation current and being configured to provide a Miller capacitance between said drain terminal and said gate terminal, said switching device being coupled to said gate terminal via a resistive element and configured to apply a gate drive voltage to said gate terminal via said resistive element, an amount of current passed by said at least one power gating transistor being dependent on said gate drive voltage; said method comprising steps of:selecting values for a Miller capacitance between said drain terminal and said gate terminal of said power gating transistor, a resistance of said resistive element, and a drive strength of said switching device such that, during operation of said integrated circuit in response to said switching device switching said gate drive voltage to allow more current to pass through said at least one power gating transistor, said Miller capacitance provides a feedback mechanism competing against said switching device to reduce a slew rate of said gate drive voltage such that said current passing between said power supply conductor and said functional circuit through said at least one power gating transistor is less than said saturation current of said at least one power gating transistor, wherein said switching device comprises a first transistor for pulling said gate drive voltage to a power off level and a second transistor for pulling said gate drive voltage to a power on level, said second transistor having a lower drive strength than said first transistor;forming an integrated circuit design based on said selected values; andmanufacturing said integrated circuit according to said integrated circuit design.
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