Digital average input current control in power converter
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G05F-001/40
G05F-001/613
출원번호
US-0661503
(2012-10-26)
등록번호
US-8773092
(2014-07-08)
발명자
/ 주소
Fishelov, Amir
Gazit, Meir
Radimov, Nikolay
출원인 / 주소
Solaredge Technologies Ltd.
대리인 / 주소
Banner & Witcoff, Ltd.
인용정보
피인용 횟수 :
1인용 특허 :
220
초록▼
A digital average-input current-mode control loop for a DC/DC power converter. The power converter may be, for example, a buck converter, boost converter, or cascaded buck-boost converter. The purpose of the proposed control loop is to set the average converter input current to the requested current
A digital average-input current-mode control loop for a DC/DC power converter. The power converter may be, for example, a buck converter, boost converter, or cascaded buck-boost converter. The purpose of the proposed control loop is to set the average converter input current to the requested current. Controlling the average input current can be relevant for various applications such as power factor correction (PFC), photovoltaic converters, and more. The method is based on predicting the inductor current based on measuring the input voltage, the output voltage, and the inductor current. A fast cycle-by-cycle control loop may be implemented. The conversion method is described for three different modes. For each mode a different control loop is used to control the average input current, and the control loop for each of the different modes is described. Finally, the algorithm for switching between the modes is disclosed.
대표청구항▼
1. A method, comprising: transferring a converter from a boost mode to an alternating buck-boost mode in response to a duty cycle dropping below a first predetermined value for at least a first predetermined number of cycles; andtransferring the converter from the alternating buck-boost mode to the
1. A method, comprising: transferring a converter from a boost mode to an alternating buck-boost mode in response to a duty cycle dropping below a first predetermined value for at least a first predetermined number of cycles; andtransferring the converter from the alternating buck-boost mode to the boost mode in response to the duty cycle climbing above a second predetermined value for at least a second predetermined number of cycles. 2. The method of claim 1, further comprising: controlling an input current of the converter according to a buck-boost mode input current control algorithm when the converter operates in the alternating buck-boost mode. 3. The method of claim 2, further comprising: sampling inductor current flowing in an inductor of the converter;sampling an input voltage of the converter;sampling output voltage output by the converter;digitally predicting the input current in a subsequent cycle based on the sampled inductor current, the sampled input voltage, and the sampled output voltage according to the buck-boost mode input current control algorithm; andcontrolling the duty cycle to approach a desired input current at the subsequent cycle. 4. The method of claim 1, further comprising: sampling inductor current flowing in an inductor of the converter;sampling an input voltage of the converter;sampling output voltage output by the converter;digitally predicting an input current in a subsequent cycle based on the sampled inductor current, the sampled input voltage, and the sampled output voltage; andcontrolling the duty cycle to approach a desired input current at the subsequent cycle. 5. The method of claim 4, wherein controlling the duty cycle comprises performing a triangle pulse width modulation (PWM). 6. An apparatus, comprising: an inductor; andcontrol logic configured to: switch the apparatus from a boost mode to an alternating buck-boost mode in response to a duty cycle dropping below a first predetermined value for at least a first predetermined number of cycles;switch the apparatus from a buck mode to an alternating buck-boost mode in response to the duty cycle climbing above a second predetermined value for at least a second predetermined number of cycles;switch the apparatus from an alternating buck-boost mode to a boost mode in response to the duty cycle climbing above a third predetermined value for at least a third predetermined number of cycles; andswitch the apparatus from an alternating buck-boost mode to a buck mode in response to the duty cycle dropping below a fourth predetermined value for at least a fourth predetermined number of cycles. 7. The apparatus of claim 6, wherein the control logic is further configured to: control an input current to the apparatus according to a buck mode input current control algorithm when operating the apparatus in the buck mode;control the input current to the apparatus according to a boost mode input current control algorithm when operating the apparatus in the boost mode; andcontrol the input current to the apparatus according to a buck-boost mode input current control algorithm when operating the apparatus in the alternating buck-boost mode. 8. The apparatus of claim 7, wherein the buck mode input current control algorithm is pre-programmed;wherein the boost mode input current control algorithm is pre-programmed; andwherein the buck-boost mode input current control algorithm is pre-programmed. 9. The apparatus of claim 6, further comprising: input terminals selectively coupled to the inductor;wherein the control logic is further configured to: sample an inductor current flowing in the inductor;sample an input voltage applied to the input terminals;sample an output voltage output by the apparatus; andpredict an input current of the apparatus in a subsequent cycle based on the sampled inductor current, the sampled input voltage, and the sampled output voltage. 10. The apparatus of claim 9, wherein the predicting of the input current is performed according to one of a buck mode input current control algorithm, a boost mode input current control algorithm, and a buck-boost mode input current control algorithm. 11. The apparatus of claim 9, wherein the control logic is further configured to: control the duty cycle to reach a desired input current at the subsequent cycle. 12. The apparatus of claim 11, wherein the controlling of the duty cycle comprises performing a triangle pulse width modulation (PWM). 13. The apparatus of claim 6, further comprising: input terminals selectively coupled to the inductor;wherein the control logic is further configured to: sample an inductor current flowing in the inductor;sample an input voltage applied to the input terminals;sample an output voltage output by the apparatus; andcalculate a target duty cycle for a subsequent cycle, based on the sampled inductor current, the sampled input voltage, and the sampled output voltage, to approach a target input current. 14. The apparatus of claim 6, wherein the control logic is further configured to: control the duty cycle to reach a desired input current of the apparatus based on an inductor current flowing in the inductor. 15. The apparatus of claim 14, wherein the control logic is further configured to: sample the inductor current at fixed intervals of a triangle pulse width modulation (PWM) waveform. 16. The apparatus of claim 6, further comprising: a first switch and a second switch; anda third switch and a fourth switch complementary to the first switch and the second switch with respect to the inductor,wherein, in the boost mode, the first switch is conducting and the second switch is not conducting,wherein, in the buck mode, the third switch is not conducting and the fourth switch is conducting, andwherein, in the alternating buck-boost mode, the first switch, the second switch, the third switch, and the fourth switch are used to control an input current of the apparatus. 17. A DC to DC converter, comprising: an inductor;one or more switches; andcontrol logic configured to: switch the converter from a boost mode to an alternating buck-boost mode in response to a duty cycle dropping below a first predetermined value for at least a first predetermined number of cycles;switch the converter from a buck mode to an alternating buck-boost mode in response to the duty cycle climbing above a second predetermined value for at least a second predetermined number of cycles;switch the converter from an alternating buck-boost mode to a boost mode in response to the duty cycle climbing above a third predetermined value for at least a third predetermined number of cycles; andswitch the converter from an alternating buck-boost mode to a buck mode in response to the duty cycle dropping below a fourth predetermined value for at least a fourth predetermined number of cycles. 18. The DC to DC converter of claim 17, wherein the control logic is further configured to: control an input current to the converter according to a buck mode input current control algorithm when operating the converter in the buck mode;control the input current to the converter according to a boost mode input current control algorithm when operating the converter in the boost mode; andcontrol the input current to the converter according to a buck-boost mode input current control algorithm when operating the converter in the alternating buck-boost mode. 19. The DC to DC converter of claim 17, further comprising: input terminals selectively coupled to the inductor;wherein the control logic is further configured to: sample an inductor current flowing in the inductor;sample an input voltage applied to the input terminals;sample an output voltage output by the converter; andpredict an input current of the converter in a subsequent cycle based on the sampled inductor current, the sampled input voltage, and the sampled output voltage. 20. The DC to DC converter of claim 19, wherein the predicting of the input current is performed according to one of a buck mode input current control algorithm, a boost mode input current control algorithm, and a buck-boost mode input current control algorithm. 21. The DC to DC converter of claim 17, wherein the control logic is further configured to: sample an inductor current flowing in the inductor; andcontrol the duty cycle based on at least the sampled inductor current. 22. The method of claim 1, further comprising transferring the converter from the buck mode to the alternating buck-boost mode in response to the duty cycle climbing above a third predetermined value for at least a third predetermined number of cycles. 23. The method of claim 22, further comprising transferring the converter from the alternating buck-boost mode to the buck mode in response to the duty cycle dropping below a fourth predetermined value for at least a fourth predetermined number of cycles.
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