Unified system architecture for elliptic-curve cryptography
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H04L-009/30
H04L-009/28
H04L-009/00
G06F-007/72
H04K-001/00
출원번호
US-0772163
(2007-06-30)
등록번호
US-8781110
(2014-07-15)
발명자
/ 주소
Gopal, Vinodh
Ozturk, Erdinc
Wolrich, Gilbert
Feghali, Wajdi K.
출원인 / 주소
Intel Corporation
대리인 / 주소
Grossman, Tucker, Perreault & Pfleger, PLLC
인용정보
피인용 횟수 :
1인용 특허 :
18
초록▼
A system for performing public key encryption is provided. The system supports mathematical operations for a plurality of public key encryption algorithms such as Rivert, Shamir, Aldeman (RSA) and Diffie-Hellman key exchange (DH) and Elliptic Curve Cryptosystem (ECC). The system supports both prime
A system for performing public key encryption is provided. The system supports mathematical operations for a plurality of public key encryption algorithms such as Rivert, Shamir, Aldeman (RSA) and Diffie-Hellman key exchange (DH) and Elliptic Curve Cryptosystem (ECC). The system supports both prime fields and different composite binary fields.
대표청구항▼
1. An apparatus comprising: a plurality of modular math processors, each modular math processor having a program store and a control register to store a configuration mode and a hold/release indicator;a plurality of multipliers; andan arbiter circuitry configured to control access to each of the plu
1. An apparatus comprising: a plurality of modular math processors, each modular math processor having a program store and a control register to store a configuration mode and a hold/release indicator;a plurality of multipliers; andan arbiter circuitry configured to control access to each of the plurality of multipliers by each of the plurality of modular math processors by choosing which of said modular math processors has access to the plurality of multipliers based at least in part on a last modular math processor to be serviced and a state of the hold release indicator of at least one of said plurality of module math processors, thereby allowing the sharing of the plurality of multipliers by the plurality of modular math processors, each of the plurality of multipliers configured to perform an unsigned integer multiply operation or a binary multiply operation for the plurality of modular math processors based on a program stored in the program store and on the configuration mode associated with the plurality of modular math processors, the configuration mode to identify a size of a multiplicand and operation type for a multiply operation; wherein said program comprises computer readable instructions which when executed by one or more of the modular math processors initiates scalar point multiplication for prime Elliptic Curve Cryptosystem (ECC) sizes greater than 521 bits. 2. The apparatus of claim 1, wherein the plurality of multipliers comprise: a carryless multiplier to perform the binary multiply operation; anda carry save multiplier to perform the unsigned integer multiply operation. 3. The apparatus of claim 2, wherein the binary multiply operation or the unsigned integer multiply operation is selected through the configuration mode. 4. The apparatus of claim 1, wherein the arbiter circuitry is further configured to allow a first modular math processor having a first configuration mode and a second modular math processor having a second configuration mode to share the plurality of multipliers in an interleaved fashion using a combination of round-robin with burst mode request grants based on a program hint provided by the first configuration mode and the second configuration mode. 5. The apparatus of claim 1, wherein the program is dynamically loaded into the program store. 6. The apparatus of claim 5, wherein a reload of the program stored in the program store is avoided by tracking programs already stored in the program store. 7. The apparatus of claim 5, wherein constants and user-defined parameters for the program are loaded separately from the program. 8. The apparatus of claim 7, wherein one of the user-defined parameters to allow skipping of checks in the program based on order of an ECC group. 9. The apparatus of claim 1, wherein a work request selected for one of the plurality of modular math processors based on programs that are stored in the program store. 10. A method comprising: configuring a plurality of modular math processors, each modular math processor having a program store and a control register to store a configuration mode and a hold/release indicatorselecting, with an arbiter, one of a plurality of modular math processor based on a program stored in the program store and at least in part on a last modular math processor to be serviced and a state of the hold release indicator of at least one of said plurality of module math processors, so as to allow a multiply operation to be forwarded to at least one of a plurality of multipliers shared by the plurality of modular math processors; wherein said program comprises computer readable instructions which, when executed by one or more of the modular math processors, initiates scalar point multiplication for prime Elliptic Curve Cryptosystem (ECC) sizes greater than 521 bits; andperforming, by the at least one of the plurality of multipliers, an unsigned integer multiply operation or a binary multiply operation based on the configuration mode associated with the selected one of the plurality of modular math processors, the configuration mode to identify a size of a multiplicand and operation type for a multiply operation. 11. The method of claim 10, wherein performing further comprises: directing the binary multiply operation to a carryless multiplier in the plurality of multipliers; anddirecting the unsigned integer multiply operation to a carry save multiplier in the plurality of multipliers. 12. The method of claim 10, wherein the arbiter is further configured to allow a first modular math processor having a first configuration mode and a second modular math processor having a second configuration mode to share the plurality of multipliers in an interleaved fashion using a combination of round-robin with burst mode request grants based on a program hint provided by the first configuration mode and the second configuration mode. 13. The method of claim 12, wherein the binary multiply operation or the unsigned integer multiply operation is selected through the configuration mode. 14. The apparatus of claim 10, wherein the program is dynamically loaded into the program store. 15. The method of claim 14, wherein a reload of the program stored in the program store is avoided by tracking programs already stored in the program store. 16. The method of claim 15, wherein constants and user-defined parameters for the program are loaded separately from the program. 17. The method of claim 16, wherein one of the user-defined parameters to allow skipping of checks in the program based on order of an ECC group. 18. A system comprising: a dynamic random access memory to store data and instructions; anda processor coupled to said memory to execute the instructions, the processor comprising:a plurality of modular math processors, each modular math processor having a program store and a control register to store a configuration mode and a hold/release indicator;a plurality of multipliers;an arbiter circuitry configured to control access to each of the plurality of multipliers by choosing which of said modular math processors has access to the plurality of multipliers based at least in part on a last modular math processor to be serviced and a state of the hold release indicator of at least one of said plurality of module math processors, thereby allowing the sharing of the plurality of multipliers by the plurality of modular math processors, the plurality of multipliers configured to perform an unsigned integer multiply operation or a binary multiply operation for each of the plurality of modular math processors based on a program stored in the program store and on the configuration mode associated with each modular math processor, the configuration mode to identify a size of a multiplicand and operation type for a multiply operation; wherein said program comprises computer readable instructions which when executed by one or more of the multipliers initiates scalar point multiplication for prime Elliptic Curve Cryptosystem (ECC) sizes greater than 521 bits. 19. The system of claim 18, wherein the arbiter circuitry is further configured to: the arbiter circuitry is further configured to allow a first modular math processor having a first configuration mode and a second modular math processor having a second configuration mode to share the plurality of multipliers in an interleaved fashion using a combination of round-robin with burst mode request grants based on a program hint provided by the first configuration mode and the second configuration mode. 20. The system of claim 18, wherein the plurality of multipliers comprise: a carryless multiplier to perform the binary multiply operation; anda carry save multiplier to perform the unsigned integer multiply operation.
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이 특허에 인용된 특허 (18)
Ramchandran, Amit, Adaptable datapath for a digital processing system.
Gressel, Carmi David; Hadad, Isaac; Dror, Itai; Molchanov, Alexey; Mostovoy, Michael, Apparatus and method for modular multiplication and exponentiation based on montgomery multiplication.
Chong,Jike; Olson,Christopher; Grohoski,Gregory F., Apparatus and method for sharing a functional unit execution resource among a plurality of functional units.
Thiel Geoffrey L. (Surrey GBX) Pontin Paul S. (Surrey GBX), Computer system using multidimensional addressing between multiple processors having independently addressable internal.
Henry, G. Glenn; Crispin, Thomas A.; Parks, Terry, Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine.
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