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Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H04L-012/43
  • H04J-003/24
출원번호 US-0149373 (2008-04-30)
등록번호 US-8798091 (2014-08-05)
발명자 / 주소
  • Black, Alistair D.
  • Chan, Kurt
출원인 / 주소
  • Broadcom Corporation
대리인 / 주소
    McDermott Will & Emery LLP
인용정보 피인용 횟수 : 2  인용 특허 : 575

초록

A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coor

대표청구항

1. A process for establishing one or more concurrent data transfers between Fibre Channel nodes comprising the steps: receiving Fibre Channel frames that are destined for a node coupled to a Fibre Channel port on a switching circuit, the Fibre Channel frames being received from a second switching ci

이 특허에 인용된 특허 (575)

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  • Black,Alistair D.; Chan,Kurt, Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost.
  • Black,Alistair D.; Chan,Kurt, Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost.
  • Black,Alistair D.; Chan,Kurt, Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost.
  • Black,Alistair D.; Chan,Kurt, Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost.
  • Black,Alistair D.; Chan,Kurt, Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost.
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  • Banks David C. ; Farnworth Steven L. ; Stoevhase Bent,CAX ; Ramsay Paul, Fibre channel switching system and method.
  • Banks, David C.; Farnworth, Steven L.; Stoevhase, Bent; Ramsay, Paul, Fibre channel switching system and method.
  • Elmasry Mohamed I. (Waterloo CAX), Field effect current mode logic gate.
  • Walker Bruce J. ; Byrne John L. ; Chow William W. ; Gertwagen John A. ; Ramirez Laura L. ; Zafman David B., Filesystem failover in a single system image environment.
  • Tanimura Takuji,JPX ; Kawabata Hiromi,JPX, Fixed-length speech signal communication system capable of compressing silent signals.
  • Hayakawa Yasushi,JPX, Flip-flop circuit, parallel-serial converting circuit, and latch circuit.
  • Kadambi,Shiri; Ambe,Shekhar; Kalkunte,Mohan; Relan,Sandeep, Flow based congestion control.
  • Linville John Walter ; Makrucki Brad Alan ; Suffern Edward Stanley ; Warren Jeffrey Robert, Flow control mechanism.
  • Takada, Syuji; Ooba, Yasuhiro, Flow controlling apparatus and node apparatus.
  • Rasmussen Kris A. (Tinton Falls NJ), Folding electronic card assembly.
  • Quinlan Una,IEX ; Cremin Con,IEX ; O'Neill Eugene,IEX ; Butler J. Noel,IEX ; Hughes Mark A.,IEX ; Fanning Neil O.,IEX, Framing codes for high-speed parallel data buses.
  • Croughwell, Rosamaria, Frequency detector.
  • Auvray Gerard,FRX ; Perron Olivier,FRX, Frequency offset correction.
  • Scott Kenneth E. (Calgary CAX), Frequency offset estimation using the phase rotation of channel estimates.
  • Takeuchi Isao (Tokyo JPX), Frequency synthesizer.
  • Bosnyak Robert J. ; Drost Robert J. ; Murata David M., Fully complementary differential output driver for high speed digital communications.
  • Kurita Takayoshi,JPX ; Kawaguchi Miyoko,JPX, Global server for transmitting calling capability to mediator and local servers for requesting calling capability from t.
  • Ewen John F. (Yorktown Heights NY) Widmer Albert X. (Katonah NY), Half-speed clock recovery and demultiplexer circuit.
  • Mizzi, Pierre M. A., Hand-held computer.
  • Moskowitz Jay (Hicksville NY) Karron Abraham (Long Beach NY) Squillante Peter (Central Islip NY) Kravitz Spencer (Hicksville NY), Handheld facsimile and alphanumeric message transceiver operating over telephone or wireless networks.
  • Harrison Colin G. (Brookfield CT), Handoff method and apparatus for mobile wireless workstation.
  • Muller Shimon ; Hendel Ariel ; Yeung Louise ; Hejza Leo ; Murthy Shree, Hardware-assisted central processing unit access to a forwarding database.
  • Chin Howey Q. ; Chan Kurt, Hierarchical storage management from a mirrored file system on a storage network segmented by a bridge.
  • Finney Damon W. (San Jose CA) Jenkins Michael O. (San Jose CA) Rayfield Michael J. (Tucson AZ), High bandwidth communications system having multiple serial links.
  • Brehmer Kevin E. (San Jose CA) Wieser James B. (Union City CA), High input impedance, high gain CMOS strobed comparator.
  • Madden William C. (Lexington MA) Bowhill William J. (Marlborough MA), High input impedance, strobed CMOS differential sense amplifier.
  • Fiedler Alan, High performance n:1 multiplexer with overlap control of multi-phase clocks.
  • Grant Robert H. (Toronto CAX) Stoevhase Bent (Toronto CAX) Purohit Robin (Toronto CAX) Sullivan Gregory T. (Brampton CAX) Book David (Thornhill CAX), High performance path allocation system and method with fairness insurance mechanism for a fiber optic switch.
  • Anderson, Terry M.; George, William R., High performance switching.
  • Vora Madhukar B. (110 Lansberry Ct. Los Gatos CA 95032) West Burnell G. (46750 Sentinel Dr. Freemont CA 94539), High speed BICMOS switches and multiplexers.
  • Wu Tien-Yu (Hsin-Chu TWX) Hwung Yung-Peng (Taipei TWX), High speed CMOS current switching circuit.
  • Lain Raymond S. (Ashland MA) Hopta Daniel F. (Bolton MA), High speed ECL latch with clock enable.
  • Banerjee Pradip (Sunnyvale CA) Keswick Paul D. (San Jose CA), High speed RAM based data serializers.
  • Nutter Robert F. (West Windsor NJ), High speed bit serial systems.
  • Mactaggart Iain Ross ; Welch James R. ; Fiedler Alan, High speed capture latch.
  • Chi Kuang-Kai ; Xu Ping, High speed common mode logic circuit.
  • Sone Kazuya (Tokyo JPX), High speed comparator having two differential amplifier stages and latch stage.
  • Kost Robert Roy ; Kassik Ronald Wayne, High speed interlaced analog interface.
  • Gerowitz Robert Glen ; Gray Carl Thomas ; Marshall John ; Riedle Christopher G. ; Rizzo Raymond Paul, High speed parallel/serial link for data communication.
  • Ribo, Jerome, High speed phase alignment process and device.
  • Buchwald Aaron W., High speed self-adjusting clock recovery circuit with frequency detection.
  • Jeong Deog-Kyoon (Seoul KRX), High speed serial link for fully duplexed data communication.
  • Hendrick Peter L. (Los Alamos NM) Speirs Donald F. (San Juan NM) Wolf Michael A. (Los Alamos NM), High speed system for reading and writing data from and into remote tags.
  • Kibar Osman ; Krishnamoorthy Ashok V., High-speed CMOS multiplexer.
  • Gerson Brian D. (Coquitlam CAX) Huscroft Kevin (Coquitlam CAX) Mallinson Martin (Billerica MA), High-speed CMOS pseudo-ECL output driver.
  • Gabara Thaddeus John, High-speed clock-enabled latch circuit.
  • Segaram, Para K., High-speed communication system with a feedback synchronization loop.
  • Segaram, Para K., High-speed communication system with a feedback synchronization loop.
  • Suzuki Hiroshi (Tokyo JPX), High-speed packet-switched communications system with end-to-end flow control and retransmission.
  • Fiedler Alan S. (Minneapolis MN), High-swing cascode current mirror.
  • Ross Floyd E. (Warrington PA), Hub for segmented virtual local area network with shared media access.
  • Henson Karl M. ; Brewer David ; Hashemi Hossein, Hub port with constant phase.
  • Tanji Todd M. ; Stronczer John J., Impedance matched CMOS transimpedance amplifier for high-speed fiber optic communications.
  • DeFoster Steven Michael ; Truestedt Horst Lebrecht, Inexpensive two-way communications switch.
  • Mabey Peter J. (Comberton GB2) Ball Diana M. (Comberton GB2), Information transmission system.
  • Phillips Ian R. (Killara AUX) Lodge Robert H. (Dee Why AUX) Bunyan Glen W. (Dee Why AUX), Injector.
  • Ezzet Ali (Sunnyvale CA), Input/output processor with a local memory providing shared resources for a plurality of input/output interfaces on an I.
  • Huang, Cheng Ai, Integral peripheral device of USB local network card and USB modem.
  • Erhart Richard A. (Chandler AZ) Ciccone Thomas W. (Paradise Valley AZ), Integrated circuit having different power supplies for increased output voltage range while retaining small device geome.
  • Delp, Gary Scott; Engbersen, Antonius Paulus; Herkersdorf, Andreas G., Integrated circuit with a VLSI chip control and monitor interface, and apparatus and method for performing operations on an integrated circuit using the same.
  • Zerbe, Jared LeVan; Donnelly, Kevin S.; Sidiropoulos, Stefanos; Stark, Donald C.; Horowitz, Mark A.; Yu, Leung; Vu, Roxanne; Kim, Jun; Garlepp, Bruno W.; Ho, Tsyr-Chyang; Lau, Benedict Chung-Kwong, Integrated circuit with timing adjustment mechanism and method.
  • Laurence B. Boucher ; Stephen E. J. Blightman ; Peter K. Craft ; David A. Higgen ; Clive M. Philbrick ; Daryl D. Starr, Intelligent network interface device and system for accelerated communication.
  • Boucher Laurence B. ; Blightman Stephen E. J. ; Craft Peter K. ; Higgen David A. ; Philbrick Clive M. ; Starr Daryl D., Intelligent network interface system method for protocol processing.
  • Laurence B. Boucher ; Stephen E. J. Blightman ; Peter K. Craft ; David A. Higgen ; Clive M. Philbrick ; Daryl D. Starr, Intelligent network interfaced device and system for accelerated communication.
  • Freeman Michael J. ; Harper Gregory W., Interactive computer system for providing an interactive presentation with personalized video, audio and graphics respo.
  • Jenq Yih-Chyun (Lake Oswego OR), Interleaved digitizer array with calibrated sample timing.
  • Eilert John H. (Wappingers Falls NY) Levin Arthur L. (Pleasant Valley NY) Thomas Julian (Poughkeepsie NY), Internally distributed monitoring system.
  • Kiriyama Tetsuro,JPX ; Teraguchi Mikiya,JPX, Interpolation circuit for encoder.
  • Edsall Tom ; Finn Norman, Interswitch link mechanism for connecting high-performance network switches.
  • Fischer Michael A. (San Antonio TX) Cox William M. (San Antonio TX) McDougall Floyd H. (San Antonio TX), LAN with interoperative multiple operational capabilities.
  • Takahashi Hiroyuki,JPX, Latch circuit for receiving small amplitude signals.
  • Lo Tin-chee (Fishkill NY), Latch interface for self-reset logic.
  • Kawanabe,Yoshitaka, Local oscillation signal supply method and circuit therefor.
  • Sako Norimitsu,JPX, Logic circuit utilizing pass transistors and logic gate.
  • Stolarczyk Larry G. (Raton NM), Long range multiple point wireless control and monitoring system.
  • Chen Shawfu, Loosely coupled system environment designed to handle a non-disruptive host connection switch after detection of an err.
  • Nguyen Thai M. (Santa Clara CA), Low noise logic amplifier with nondifferential to differential conversion.
  • Cruz Jose M. ; Bosnyak Robert J. ; Drost Robert J., Low phase noise LC oscillator for microprocessor clock distribution.
  • Rapp Adolph K. (Los Gatos CA), Low power CMOS frequency divider.
  • Koleda Randy K. (Gansevoort NY), Low power consumption wireless data transmission and control system.
  • Koleda Randy K. (Gansevoort NY), Low power consumption wireless data transmission and control system.
  • Zhang Zhong-Xuan (Fremont CA) Lin Jyhfong (Fremont CA) Wang Yun-Ti (Fremont CA), Low power high speed CMOS current switching circuit.
  • Kocaman, Namik, Low voltage differential to single-ended converter.
  • Maeder Heinz B. (Nyon CHX), MOS Latch circuit.
  • Allstot David J. (Pittsburgh PA) Kiasei Sayfe (Corvallis OR), MOS folded source-coupled logic.
  • Frommer Aviv,ILX ; Pinto Mark R., MOSFET substrate current logic.
  • Bailey Joseph A., Mechanism for writing back selected doublewords of cached dirty data in an integrated processor.
  • Kricka Larry J. ; Wilding Peter, Mesoscale devices and methods for analysis of motile cells.
  • Brooks Fred (Houston TX) Daves Thomas W. (The Woodlands TX) Lang William (Spring TX), Method and apparatus for activation of furnace slag base cement.
  • Zavalkovsky, Arthur; Zlotkin, Gilad, Method and apparatus for adapting enforcement of network quality of service policies based on feedback about network conditions.
  • Ziai, Syrus; Jordan, Paul; Robson, Craig; Donohue, Ryan; Pong, Fong, Method and apparatus for calculating TCP and UDP checksums while preserving CPU resources.
  • Krebs Jay (Crystal Lake IL) Freeburg Thomas A. (Arlington Heights IL), Method and apparatus for communicating variable length messages between a primary station and remote stations of a data.
  • Aronson Michael D. ; Silverman Joel, Method and apparatus for communication and translation of a plurality of digital protocols.
  • Lee, Gabriel; Langley, David, Method and apparatus for configuring network devices.
  • Langley,David; Lee,Gabriel, Method and apparatus for configuring network devices with subnetworks in an ATM environment and retrieving permanent virtual channel (PVC) configuration information from network devices.
  • Kabuo Hideyuki (Osaka JPX) Edamatsu Hisakazu (Osaka JPX) Taniguchi Takashi (Osaka JPX), Method and apparatus for controlling a clock signal.
  • Sandorfi Miklos A., Method and apparatus for controlling concurrent data transmission from multiple sources in a channel communication syst.
  • Brent Jason B. (Wiltshire GB3) Hatala Edward (Wiltshire GB3) Timms John (Berkshire GB3), Method and apparatus for controlling congestion in packet switching networks.
  • Thacker Charles P. (Palo Alto CA), Method and apparatus for deskewing digital data.
  • Kotzin Michael D. (Buffalo Grove IL) Schuler Joseph J. (Roselle IL), Method and apparatus for digitizing a wide frequency bandwidth signal.
  • Bidyut Parruck ; Makarand Dharmapurikar ; Uday Govind Joshi IN, Method and apparatus for forming a virtual circuit.
  • Nelson Jeffrey J. ; Fugere James P. ; Jessop Ken N., Method and apparatus for implementing hunt group support for a crosspoint controller.
  • Stoevhase Bent,CAX ; Malavalli Kumar,CAX, Method and apparatus for implementing virtual circuits in a fibre channel system.
  • Alain Blanc FR; Bernard Brezzo FR; Pierre Debord FR; Patrick Jeanniot FR; Alain Saurel FR, Method and apparatus for managing contention in a self-routing switching architecture in a port expansion mode.
  • Leung Wingyu, Method and apparatus for maximizing the random access bandwidth of a multi-bank DRAM in a computer graphics system.
  • Wojcik, David R., Method and apparatus for negotiating quality-of-service parameters for a network connection.
  • David A Kranzler, Method and apparatus for optimizing a switched arbitrated loop for maximum access fairness.
  • Logsdon Brian D., Method and apparatus for overriding bus prioritization scheme.
  • Tayloe Daniel R. (Arlington Heights IL) Bruckert Eugene J. (Arlington Heights IL), Method and apparatus for paging in a communication system.
  • Kawatani, Takahiko, Method and apparatus for pattern recognition using a recognition dictionary partitioned into subcategories.
  • Williams, Robert; Erimli, Bahadir, Method and apparatus for performing priority-based flow control.
  • Jared L. Zerbe ; Grace Tsang ; Clemenz L. Portmann, Method and apparatus for phase interpolation.
  • Tzeng Tzungren A. ; Normoyle Kevin, Method and apparatus for preventing a race condition and maintaining cache coherency in a processor with integrated cach.
  • Ling Fuyun (Jamaica Plain MA) Labedz Gerald P. (Chicago IL), Method and apparatus for providing carrier frequency offset compensation in a TDMA communication system.
  • Stengel Robert E. (Ft. Lauderdale FL) Sharp Ronald E. (Plantation FL) Yester Francis R. (Arlington Heights IL), Method and apparatus for providing power conservation in a communication system.
  • Dunning, David S.; Abhayagunawardhana, Chamath, Method and apparatus for receiving data.
  • Zerbe, Jared L., Method and apparatus for receiving high speed signals with low latency.
  • Gallagher Brian (Marlboro MA) Sandorfi Miklos A. (Foxboro MA), Method and apparatus for reordering frames.
  • Burke Christopher J. (Maple Valley WA) Chaffee Janice M. (Auburn WA) Nir Erez (Bellevue WA) Kee Thomas E. (Lynnwood WA), Method and apparatus for selecting between a plurality of communication paths.
  • Bennett Dwayne (Scarborough CAX), Method and apparatus for tracking buffer availability.
  • Johansson Kjell (Bjrred SEX) Lindoff Mats E. G. (Lund SEX), Method and apparatus for upgrading cellular mobile telephones.
  • Adams John M. ; Hoglund Timothy E. ; Johnson Stephen M. ; Reber Mark A. ; Weber David M., Method and apparatus for using multiple FIFOs to improve flow control and routing in a communications receiver.
  • Dawkins, George John; Lee, Van Hoa; Randall, David Lee; Tran, Kiet Anh, Method and apparatus to implement logical partitioning of PCI I/O slots.
  • Leung Wingyu (Cupertino CA) Horowitz Mark A. (Mountain View CA), Method and circuitry for clock synchronization.
  • Anand, Sanjay; Srinivas, N K; Hyder, Jameel; Brandon, Kyle E., Method and computer program product for offloading processing tasks from software to hardware.
  • Gustavsson Mikael,SEX ; Tan Nianxiong, Method and device for analogue to digital conversion.
  • Lagoutte Pierre,FRX ; Grenot Thierry,FRX, Method and device for the control of congestion in sporadic exchanges of data packets in a digital transmission network.
  • Chung David H., Method and integrated circuit for high-bandwidth network server interfacing to a local area network using CSMA/CD.
  • Stephen Arthur Oliva, Method and system for connection admission control.
  • Banks, David; Malavalli, Kumar; Ramsay, Paul; Teow, Kha Sin; Zhu, Jieming, Method and system for creating and implementing zones within a fibre channel system.
  • Elzur,Uri, Method and system for data placement of out-of-order (OOO) TCP segments.
  • Claude Galand FR; Pierre-Andre Foriel FR; Aline Fichou FR; Marcus Enger DE, Method and system for implementing congestion detection and flow control in high speed digital network.
  • Bonnot Christophe (Sevres FRX) Gerbault Bertrand (Paris FRX) Seguy Jean-Christophe (Fontenay aux Roses FRX), Method and system for interleaving and deinterleaving SDH frames.
  • Bennett,Joseph A., Method and system for keeping two independent busses coherent.
  • Thompson, Michael I., Method and system for processing network data packets.
  • Fijolek, John G.; Beser, Nurettin B., Method and system for providing quality-of-service in a data-over-cable system.
  • Mattson Richard L. (San Jose CA) Rodriguez-Rosell Juan A. (Gaithersburg MD), Method for dynamically allocating LRU/MRU managed memory among concurrent sequential processes.
  • Chesson Gregory L. ; Pinkerton James T. ; Salo Eric, Method for efficient translation of memory addresses in computer systems.
  • Jeong Deog-Kyoon (Seoul KRX), Method for generating digital communication system clock signals & circuitry for performing that method.
  • Comroe Richard A. (Dundee IL) Grube Gary W. (Palatine IL), Method for inter operation of a cellular communication system and a trunking communication system.
  • Linam, Stephen Dale; Perez, Michael Anthony; Rodriguez, Louis Gabriel; Wenning, Mark Walz, Method for recovering from a machine check interrupt during runtime.
  • Sharon Peng ; Mihaela Van Der Schaar, Method for storing and retrieving data that conserves memory bandwidth.
  • Pedersen Bradley J. ; Perry Werner Kurt, Method for supporting an extensible and dynamically bindable protocol stack in a distrubited process system.
  • Natanson, Sarit Shani; Katzri, Lior; Gershon, Benny; Goldstein, Dror, Method of establishing MPOA shortcut virtual channel connections.
  • Khotimsky, Denis Andreyevich; Krishnan, Santosh, Method of maintaining packet order in multipath transmission systems having non-uniform traffic splitting.
  • Owen Frank C. G. (Petts Wood GB2), Method of optimizing the transmission of idle beacon messages and a communications system using the method.
  • Zadikian, H. Michael; Plote, Steven E.; Adler, John C.; Autry, David P.; Saleh, Ali Najib, Method of providing network services.
  • Zadikian, H. Michael; Plote, Steven E.; Adler, John C.; Autry, David P.; Saleh, Ali Najib, Method of providing network services.
  • Pinkerton,James; Gbadegesin,Abolade; Kaniyar,Sanjay; Srinivas,Nk, Method to offload a network stack.
  • Pinkerton,James T.; Gbadegesin,Abolade; Kaniyar,Sanjay; Srinivas,Nelamangala Krishaswamy, Method to synchronize and upload an offloaded network stack connection with a network stack.
  • Desne Jean Rose GB; Roy Harold Mauger GB, Method, interface and system for connecting communication traffic across an intermediate network.
  • Madukkarumukumana,Rajesh S.; Ni,Jie, Method, system, and article of manufacture for utilizing host memory from an offload adapter.
  • Albert Alfonse Slane, Method, system, and program for managing requests to a cache using flags to queue and dequeue data in a buffer.
  • Mies,Carl; Warren,Bruce Gregory, Methods and apparatus for device zoning in fibre channel arbitrated loop systems.
  • Berman Stuart B., Methods and apparatus for fiber channel interconnection of private loop devices.
  • Derby Jeffrey H. (Chapel Hill NC) Doeringer Willibald A. (Langnau CHX) Dykeman Harold D. (Rueschlikon NC CHX) Li Liang (Chapel Hill NC) Sandick Haldon J. (Durham NC) Vu Ken V. (Cary NC), Methods and apparatus for interconnecting local area networks with wide area backbone networks.
  • Warren,Bruce Gregory; Goodwin,William P.; Mies,Carl; Johnson,Bruce E.; White,Michael L.; Eng,Warren, Methods and apparatus for switching fibre channel arbitrated loop systems.
  • Desai,Tushar; Gupta,Shashank; Jain,Praveen; Ghosh,Kalyan K., Methods and devices for exchanging peer parameters between network devices.
  • Bass Brian Mitchell ; Siegel Michael Steven ; Strole Norman Clark, Methods, systems and computer program products for suppressing multiple destination traffic in a computer network.
  • Lentz Derek J. (Los Gatos CA) Hagiwara Yasuaki (Santa Clara CA) Lau Te-Li (Palo Alto CA) Tang Cheng-Long (San Jose CA) Nguyen Le Trong (Monte Sereno CA), Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU.
  • Brown Anthony Kevin Dale (26 Equestrian Drive Kanata ; Ontario CAX K2M 1C1 ), Microwave multiphase detector.
  • Metroka Michael P. (Algonquin IL) Kiem Joshua P. (Park Ridge IL), Mixed-mode transceiver system.
  • Miyazaki Shinichi (Tokyo JPX), Mobile telephone station with power saving circuit.
  • Lyles Joseph B. (Mountain View CA) Bell Alan G. (Palo Alto CA), Modification to a reservation ring mechanism for controlling contention in a broadband ISDN fast packet switch suitable.
  • Hipp, Christopher G., Modular network interface system and method.
  • Kikinis Dan (Saratoga CA), Modular notebook computer having a planar array of module bays and a pivotally attached flat-panel display.
  • Koenck Steven E. ; Miller Phillip ; West Guy J. ; Mahany Ronald L. ; Kinney Patrick W., Modular portable data processing terminal having a higher layer and lower layer partitioned communication protocol stack for use in a radio frequency communications network.
  • Stein Per (Stockholm SEX), Modular radio communications system.
  • Koenck Steven E. (Cedar Rapids IA) Miller Phillip (Cedar Rapids IA) West Guy J. (Cedar Rapids IA) Mahany Ronald L. (Cedar Rapids IA) Kinney Patrick W. (Cedar Rapids IA), Modular, portable data processing terminal for use in a radio frequency communication network.
  • Miller ; II Robert R. (Morris Township ; Morris County NJ) Partridge ; III B. Waring (Mendham NJ) Russell Jesse E. (Piscataway NJ) Schroeder Robert E. (Morris Township ; Morris County NJ), Multi-band wireless radiotelephone operative in a plurality of air interface of differing wireless communications system.
  • Shastri, Kal, Multi-channel clock recovery circuit.
  • Wong, Carl, Multi-function interface for connectivity between a communication device and a host.
  • Kristen Marie Robins ; Ronnie B. Kon, Multi-interface symmetric multiprocessor.
  • Heitkamp, Ross; Armstrong, Michael; Beesley, Michael; Krishnamurthi, Ashok; Powell, Kenneth Richard; Wu, Mike M., Multi-master and diverse serial bus in a complex electrical system.
  • Leung Wu-Hon F. (Downers Grove IL) Morgan Michael J. (Warrenville IL) Tu Shi-Chuan (Lisle IL), Multi-media virtual circuit.
  • Levinson Frank H. (Palo Alto CA), Multi-mode high speed network switch for node-to-node communication.
  • Pearson Gregory (Granada Hills CA) Melhorn Nathan R. (Framingham MA) Onarato Michael F. (Acton MA) Richards Craig A. (Wrentham MA), Multi-mode modem and data transmission method.
  • Lee Lance K. ; Shyu Jyn-Bang ; Wang David Y., Multi-phase data/clock recovery circuitry and methods for implementing same.
  • Chen-chih Huang TW, Multi-phase-locked loop for data recovery.
  • Creedon Tadhg,IEX ; Moran Paul J.,GBX ; McKerrel Graeme J.,GBX, Multi-port communication network device including common buffer memory with threshold control of port packet counters.
  • Rozenblit Moshe (Chatham NJ), Multi-rate synchronous virtual circuit network for voice and data communications.
  • Gourse Stanley J. (Highland MD), Multichannel frequency and phase variable radio frequency simulator.
  • Todd Robert E. (Blythe GB3), Multicomponent wireless system with periodic shutdown of transmitting and receiving modes.
  • Erimli Bahadir ; Runaldue Thomas J., Multicopy queue structure with searchable cache area.
  • Besenfelder ; Edward Roald, Multiple bit deskew buffer.
  • Kuttanna Belliappa Manavattira ; Patel Rajesh ; Snyder Michael Dean, Multiple load miss handling in a cache memory system.
  • Freund Thomas J. (Austin TX), Multiple protocol communication interface for distributed transaction processing.
  • Kadambi,Shiri; Ambe,Shekhar; Kalkunte,Mohan; Relan,Sandeep; Christie,Allan; Elzur,Uri; Lund,Martin; Talayco,Daniel, Multiple virtual channels for use in network devices.
  • David C. Reynolds, Multiplexed distribution system for CMOS signals.
  • Subramanian Rajan (Newark CA) Chatwani Dilip (Newark CA) Chiang Winnis (Los Altos Hills CA) Davar Jonathan (San Jose CA) Opher Ayal (Mountain View CA) Sawant Shiva (Sunnyvale CA), Multiplexing of communications services on a virtual service path in an ATM network or the like.
  • Wu Bin, N-way circular phase interpolator for generating a signal having arbitrary phase.
  • Lindsay, Steven B., Network adapter with TCP windowing support.
  • Lindsay, Steven B., Network adapter with large frame transfer emulation.
  • Blightman,Stephen E. J.; Starr,Daryl D.; Philbrick,Clive M., Network interface device employing a DMA command queue.
  • Blightman,Stephen E. J.; Starr,Daryl D.; Philbrick,Clive M., Network interface device for error detection using partial CRCS of variable length message portions.
  • Bach Maurice J. (Haifa ILX) Hoppes Robert B. (Hyde Park NY) Meltzer Clifford B. (Ossining NY) Parchinski Kenneth J. (Wappingers Falls NY) Whelan Gary J. (Rhinebeck NY), Network processor for transforming a message transported from an I/O channel to a network by adding a message identifier.
  • Atsushi Shionozaki JP, Network resource reservation control method and apparatus, receiving terminal, sending terminal, and relay apparatus.
  • Kevin J. Rowett ; Crosswell C. Collins ; Eric R. Buell, Network router integrated onto a silicon chip.
  • Hsieh Wen-Jai, Network routing switch with non-blocking arbitration system.
  • Gollnick Charles D. ; Luse Ronald E. ; Pavek John G. ; Sojka Marvin L. ; Cnossen James D. ; Danielson Arvin D. ; Mahany Ronald L. ; Detweiler Mary L. ; Spiess Gary N. ; West Guy J. ; Young Amos D. ; , Network supporting roaming, sleeping terminals.
  • Chou Ger-Chih (San Jose CA) Dahlgren Kent Blair (San Jose CA) Hsieh Wen-Jai (Palo Alto CA), Network switch with arbitration sytem.
  • Shiobara Yashuhisa (Tokyo JPX), Network system using token-passing bus with multiple priority levels.
  • Kenichi Nagami JP; Yasuhiro Katsube JP; Shigeo Matsuzawa JP, Node device and scheme for sharing common virtual connection indentifier between end-nodes.
  • Malladi Srinivasa R. (Santa Clara CA), Node loop port communication interface super core for fibre channel.
  • Ono Akihiko,JPX ; Kawai Takumi,JPX, Noise eliminating circuit.
  • Monacos Steve P. (Altadena CA), Non-blocking crossbar permutation engine with constant routing latency.
  • Boucher, Laurence B.; Blightman, Stephen E. J.; Craft, Peter K.; Higgen, David A.; Philbrick, Clive M.; Starr, Daryl D., Obtaining a destination address so that a network interface device can write network data without headers directly into host memory.
  • Connery Glenn William ; Sherer W. Paul ; Jaszewski Gary ; Binder James S., Offload of TCP segmentation to a smart adapter.
  • Hirofumi Shimomura JP; Naoya Henmi JP; Hitoshi Takeshita JP, Optical add-drop multiplexer.
  • Brown Brian ; Haney Jeanne ; Mangin James ; Pitcher Derek H. ; Seshadri Kishore K., Optimizing flow detection and reducing control plane processing in a multi-protocol over ATM (MPOA) system.
  • Chambers Peter ; Adusumilli Swaroop ; Meiyappan Subramanian S., Optimizing the performance of asynchronous bus bridges with dynamic transactions.
  • Jochen Mahlein DE; Walter Springmann DE, Overvoltage protection apparatus for a matrix converter.
  • Tymes LaRoy (Palo Alto CA), Packet data communication network.
  • Hausman Richard J. (Soquel CA) Birenbaum Lazar (Saratoga CA), Packet filtering for data networks.
  • Ide Motoki (Tokyo JPX), Pager receiver for enabling to omit power-on signal for receiving synchronization code in pager signal.
  • Row Edward J. (Mountain View CA) Boucher Laurence B. (Saratoga CA) Pitts William M. (Los Altos CA) Blightman Stephen E. (San Jose CA), Parallel I/O network file server architecture.
  • Smith Robert T. (Mesa AZ), Parallel clocked latch.
  • Boucher Laurence B. ; Blightman Stephen E. J. ; Craft Peter K. ; Higgen David A. ; Philbrick Clive M. ; Starr Daryl D., Passing a communication control block from host to a local device such that a message is processed on the device.
  • Boucher Laurence B. ; Blightman Stephen E. J. ; Craft Peter K. ; Higgen David A. ; Philbrick Clive M. ; Starr Daryl D., Passing a communication control block from host to a local device such that a message is processed on the device.
  • Grant Robert H. (Toronto CAX) Stoevhase Bent (Toronto CAX) Purohit Robin (Toronto CAX) Book David (Thornhill CAX), Path allocation system and method having double link list queues implemented with a digital signal processor (DSP) for a.
  • Winter Stephen J. ; Stephenson Jack E., Performance enhancing memory interleaver for data frame processing.
  • Kallin Harald (Sollentuna SEX) Bodin Roland S. (Spanga SEX), Periodic system ordered rescan in a cellular communication system.
  • Stevens Ashley Miles,GBX, Peripheral buses for integrated circuit.
  • Rimmer Todd M. (Frazer PA) Jordan William P. (Ephrata PA), Peripheral device interface for dynamically selecting boot disk device driver.
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