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High voltage power semiconductor devices on SiC

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/15
  • H01L-031/0312
  • H01L-021/02
  • H01L-029/16
출원번호 US-0959855 (2013-08-06)
등록번호 US-8860040 (2014-10-14)
발명자 / 주소
  • Loboda, Mark
  • Chung, Gilyong
출원인 / 주소
  • Dow Corning Corporation
대리인 / 주소
    Nixon Peabody LLP
인용정보 피인용 횟수 : 6  인용 특허 : 40

초록

4H SiC epiwafers with thickness of 50-100 μm are grown on 4° off-axis substrates. Surface morphological defect density in the range of 2-6 cm−2 is obtained from inspection of the epiwafers. Consistent carrier lifetime in the range of 2-3 μs has been obtained on these epiwafers. Very low BPD density

대표청구항

1. A high voltage semiconductor device comprising: a single crystal, 4° off-axis 4H-SiC substrate tilted away from the c-axis toward the direction, having an area of 0.02 to 1.5 cm2 having: a micropipe density of less than 1/cm2,a screw dislocation density of less than 2000/cm2, anda basal plane di

이 특허에 인용된 특허 (40)

  1. Burk ; Jr. Albert A. ; Thomas Linard M., Ceiling arrangement for an epitaxial growth reactor.
  2. Larkin David J. ; Neudeck Philip G. ; Powell J. Anthony ; Matus Lawrence G., Compound semi-conductors and controlled doping thereof.
  3. Wenski, Guido; Altmann, Thomas; Huber, Anton; Heilmaier, Alexander, Double-sided polishing process for producing a multiplicity of silicon semiconductor wafers.
  4. Wenski, Guido; Siebert, Wolfgang; Messmann, Klaus; Heier, Gerhard; Altmann, Thomas; F?rfanger, Martin, Epitaxially coated semiconductor wafer and process for producing it.
  5. Schauer, Reinhard; Werner, Norbert, Epitaxially coated silicon wafer and method for producing epitaxially coated silicon wafers.
  6. Davis Robert F. (Raleigh NC) Kong Hua-Shuang (Raleigh NC) Glass Jeffrey T. (Apex NC) Carter ; Jr. Calvin H. (Raleigh NC), Growth of beta-sic thin films and semiconductor devices fabricated thereon.
  7. Ellison, Alexandre; Hallin, Christer; Magnusson, Björn; Bergman, Peder, Homoepitaxial growth of SiC on low off-axis SiC wafers.
  8. Kong Hua-Shuang (Raleigh NC) Glass Jeffrey T. (Apex NC) Davis Robert F. (Raleigh NC), Homoepitaxial growth of alpha-SiC thin films and semiconductor devices fabricated thereon.
  9. Godshall,Mark A., Lapping machine.
  10. Powell, Adrian; Brady, Mark; Mueller, Stephan G.; Tsvetkov, Valeri F.; Leonard, Robert T., Low 1C screw dislocation 3 inch silicon carbide wafer.
  11. Powell,Adrian; Brady,Mark; Mueller,Stephen G.; Tsvetkov,Valeri F.; Leonard,Robert T., Low 1c screw dislocation 3 inch silicon carbide wafer.
  12. Powell,Adrian; Brady,Mark; Tsvetkov,Valeri F., Low basal plane dislocation bulk grown SiC wafers.
  13. Vodakov, Yury Alexandrovich; Ramm, Mark Grigorievich; Mokhov, Evgeny Nikolaevich; Roenkov, Alexandr Dmitrievich; Makarov, Yury Nikolaevich; Karpov, Sergei Yurievich; Ramm, Mark Spiridonovich; Helava,, Low defect density silicon carbide.
  14. Powell,Adrian; Brady,Mark; Leonard,Robert Tyler, Low micropipe 100 mm silicon carbide wafer.
  15. Kai Fumitaka,JPX ; Maeda Masahiko,JPX ; Yamashita Jun-ichi,JPX ; Yubitani Toshiharu,JPX ; Hajime Hirofumi,JPX ; Harada Takamitsu,JPX, Method for fabricating semiconductor wafers.
  16. Ioku Toshinori (Nara JPX) Sakurai Takeshi (Nara JPX), Method for making a silicon carbide substrate.
  17. Nishiguchi, Taro; Sasaki, Makoto; Harada, Shin; Okita, Kyoko; Inoue, Hiroki; Fujiwara, Shinsuke; Namikawa, Yasuo, Method for manufacturing silicon carbide substrate.
  18. Kamata,Isaho; Tsuchida,Hidekazu, Method for preparing SiC crystal and SiC crystal.
  19. Dmitriev Vladimir A. (Fuquay-Varina NC) Rendakova Svetlana V. (St. Petersburg RUX) Ivantsov Vladimir A. (St. Petersburg RUX) Carter ; Jr. Calvin H. (Cary NC), Method for reducing micropipe formation in the epitaxial growth of silicon carbide and resulting silicon carbide structu.
  20. Powell,J. Anthony; Neudeck,Philip G.; Trunek,Andrew J.; Spry,David J., Method for the growth of large low-defect single crystals.
  21. Mynbaeva, Marina; Tsvetkov, Denis; Dmitriev, Vladimir; Lebedev, Alexander; Savkina, Nataliya; Syrkin, Alexander; Saddow, Stephen; Mynbaev, Karim, Method of crystal growth and resulted structures.
  22. Minami Hideaki,JPX, Method of double-side lapping a wafer and an apparatus therefor.
  23. Eshita Takashi (Inagi JPX) Mieno Fumitake (Kawasaki JPX) Furumura Yuji (Kawasaki JPX) Itoh Kikuo (Yokohama JPX), Method of growing a single crystalline b 상세보기
  • Kud, Francis; Hobart, Karl; Spencer, Mike, Method of making mosaic array of thin semiconductor material of large substrates.
  • Kato Tadahiro,JPX ; Masumura Hisashi,JPX ; Okuni Sadayuki,JPX ; Kudo Hideo,JPX, Method of manufacturing semiconductor wafers.
  • Kitou Yasuo,JPX ; Sugiyama Naohiro,JPX ; Okamoto Atsuto,JPX ; Tani Toshihiko,JPX ; Kamiya Nobuo,JPX, Method of producing single crystals and a seed crystal used in the method.
  • Bauer,Matthias; Weeks,Keith Doran; Tomasini,Pierre; Cody,Nyles, Methods of making substitutionally carbon-doped crystalline Si-containing materials by chemical vapor deposition.
  • Murphy, Brian; Wahlich, Reinhold, Multilayered semiconductor wafer and process for manufacturing the same.
  • Hobgood,Hudson M.; Jenny,Jason R.; Malta,David Phillip; Tsvetkov,Valeri F.; Carter, Jr.,Calvin H.; Leonard,Robert Tyler; Fechko, Jr.,George J., One hundred millimeter single crystal silicon carbide wafer.
  • Kiuchi, Etsuo; Hayashi, Toshiyuki, Polishing apparatus and method.
  • Kuhn, Harald; Stein, Rene; Voelkl, Johannes; Zintl, Wolfgang, Seed crystal holder with lateral mount for an SiC seed crystal.
  • Jenny,Jason Ronald; Malta,David Phillip; Hobgood,Hudson McDonald; Mueller,Stephan Georg; Brady,Mark; Leonard,Robert Tyler; Powell,Adrian; Tsvetkov,Valeri F.; Fechko, Jr.,George J.; Carter, Jr.,Calvin H., Seeded single crystal silicon carbide growth and resulting crystals.
  • Jun Kishimoto JP, Semiconductor wafer and method for fabrication thereof.
  • Wenski, Guido; Altmann, Thomas; Feuchtinger, Ernst; Bernwinkler, Willibald; Winkler, Wolfgang; Heier, Gerhard, Semiconductor wafer with improved flatness, and process for producing the semiconductor wafer.
  • Maruyama, Takayuki, Silicon carbide single crystal wafer and producing method thereof.
  • Kawasaki, Takafumi; Mimura, Seiichi; Nishida, Hirokazu; Yoshida, Yasuhiro, Slurry for slicing silicon ingot and method for slicing silicon ingot using the same.
  • Davis Robert F. (Raleigh NC) Carter ; Jr. Calvin H. (Raleigh NC) Hunter Charles E. (Durham NC), Sublimation of silicon carbide to produce large, device quality single crystals of silicon carbide.
  • Harada, Shin; Sasaki, Makoto; Masuda, Takeyoshi, Substrate composed of silicon carbide with thin film, semiconductor device, and method of manufacturing a semiconductor device.
  • Powell,Adrian; Brixius,William H.; Leonard,Robert Tyler; McClure,Davis Andrew; Laughner,Michael, Three inch silicon carbide wafer with low warp, bow, and TTV.
  • Li Xudong,SGX ; Dai Xuechun,SGX ; Hua Guangping,SGX ; Tiew Kei Tee,SGX, Trenchless buried contact process technology.
  • 이 특허를 인용한 특허 (6)

    1. Loboda, Mark; Parfeniuk, Christopher, Flat SiC semiconductor substrate.
    2. Loboda, Mark; Chung, Gilyong, High voltage power semiconductor device on SiC.
    3. Loboda, Mark; Drachev, Roman; Hansen, Darren; Sanchez, Edward, Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a support shelf which permits thermal expansion.
    4. Loboda, Mark, Method for growing a SiC crystal by vapor deposition onto a seed crystal provided on a supporting shelf which permits thermal expansion.
    5. Hansen, Darren; Loboda, Mark; Manning, Ian; Moeggenborg, Kevin; Mueller, Stephan; Parfeniuk, Christopher; Quast, Jeffrey; Torres, Victor; Whiteley, Clinton, Method for manufacturing SiC wafer fit for integration with power device manufacturing technology.
    6. Hansen, Darren; Loboda, Mark; Manning, Ian; Moeggenborg, Kevin; Mueller, Stephan; Parfeniuk, Christopher; Quast, Jeffrey; Torres, Victor; Whiteley, Clinton, Method for manufacturing SiC wafer fit for integration with power device manufacturing technology.
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