According to one embodiment, a semiconductor device has a transistor comprising a source electrode, a drain electrode, and a gate electrode, a diode and a switch element connected in series between the gate and source electrodes of the transistor, and a control circuit configured to supply a control
According to one embodiment, a semiconductor device has a transistor comprising a source electrode, a drain electrode, and a gate electrode, a diode and a switch element connected in series between the gate and source electrodes of the transistor, and a control circuit configured to supply a control signal for switching the switch element. The control circuit has a predetermined time constant and is configured to supply the control signal to the switch element if a pulse signal having a voltage that is equal to or higher than a predetermined voltage is supplied to the gate electrode of the transistor.
대표청구항▼
1. A semiconductor device, comprising: a first transistor comprising a source electrode, a drain electrode, and a gate electrode;a diode and a switch element connected in series between the gate and source electrodes of the first transistor; anda control circuit configured to supply a control signal
1. A semiconductor device, comprising: a first transistor comprising a source electrode, a drain electrode, and a gate electrode;a diode and a switch element connected in series between the gate and source electrodes of the first transistor; anda control circuit configured to supply a control signal for switching the switch element;wherein the control circuit has a predetermined time constant and is configured to supply the control signal to the switch element to turn off the switch element for a predetermined time period, if a pulse signal having a voltage that is equal to or higher than a predetermined voltage is supplied to the gate electrode of the first transistor. 2. The semiconductor device according to claim 1, wherein the control circuit comprises: a bias circuit including a capacitor and a resistor connected in series between the source and gate electrodes of the transistor, anda switching circuit configured to switch ON/OFF state of the switch element based on a voltage between the capacitor and the resistor. 3. The semiconductor device according to claim 2, wherein the switching circuit is a CMOS inverter circuit. 4. The semiconductor device according to claim 3, wherein the CMOS inverter circuit comprises a P-type transistor and an N-type transistor, the gate electrodes of the P-type transistor and the N-type transistor being connected to each other, and the drain electrodes of the P-type transistor and the N-type transistor being connected to each other. 5. The semiconductor device according to claim 4, wherein the switch element is a transistor comprising a gate electrode, a source electrode, and a drain electrode,the drain electrodes of the P-type transistor and the N-type transistor are connected to the gate electrode of the transistor comprising the switch element. 6. The semiconductor device according to claim 5, wherein source and drain channels of the transistor comprising the switch element are connected in series to the diode. 7. The semiconductor device according to claim 1, wherein the switch element is a second transistor comprising a gate electrode, a source electrode, and a drain electrode,source and drain channels of the second transistor are connected in series to the diode, andthe gate electrode of the second transistor is configured to receive the control signal supplied from the control circuit. 8. The semiconductor device according to claim 1, wherein the predetermined voltage is higher than a voltage used during operation of the semiconductor device. 9. The semiconductor device according to claim 8, wherein, the first transistor includes a gate insulation film and the predetermined voltage is a voltage at which a gate insulation film of the first transistor can break. 10. A semiconductor device, comprising: a first transistor;a diode and a semiconductor element connected in series between a gate electrode and a source electrode of the first transistor; anda control circuit configured to control a resistance of the semiconductor element,wherein the control circuit has a predetermined time constant and is configured to increase the resistance of the semiconductor element if a pulse signal having a voltage that is equal to or higher than a predetermined voltage is supplied to the gate electrode of the first transistor. 11. The semiconductor device according to claim 10, wherein the control circuit comprises: a bias circuit including a capacitor and a resistor connected between the source and gate electrodes of the transistor, anda switching circuit configured to switch the resistance of the semiconductor element based on the output of the bias circuit. 12. The semiconductor device according to claim 11, wherein the switching circuit is a CMOS inverter circuit. 13. The semiconductor device according to claim 12, wherein the CMOS inverter circuit comprises a P-type transistor and an N-type transistor, the gate electrodes of the P-type transistor and the N-type transistor being connected, and the drain electrodes of the P-type transistor and the N-type transistor being connected. 14. The semiconductor device according to claim 10, wherein the semiconductor element is a second transistor comprising a gate electrode, a source electrode, and a drain electrode,source and drain channels of the second transistor comprising the semiconductor element are connected to the diode in series, and the gate electrode of the second transistor is configured to receive a signal supplied from the control circuit. 15. A semiconductor device, comprising: a first transistor comprising a first electrode, a second electrode, and a gate electrode;a capacitor and a resistor connected in series between the gate and first electrodes of the first transistor,an inverter circuit comprising a P-type transistor and an N-type transistor connected in series between the gate and first electrodes of the first transistor, each gate electrode of the P-type transistor and the N-type transistor being connected to each other and being connected to a connection point between the capacitor and the resistor, anda diode and a second transistor connected in series between the gate and first electrodes of the first transistor, a gate electrode of the second transistor being connected to a connection point between the P-type transistor and the N-type transistor. 16. The semiconductor device according to claim 15, wherein the first and the second transistors are N-type MOS transistors and the gate electrode of the first transistor is connected to the capacitor, the P-type transistor, and a cathode of the diode. 17. The semiconductor device according to claim 15, wherein the first and the second transistors are P-type MOS transistors and the gate electrode of the first transistor is connected to the capacitor, the N-type transistor, and an anode of the diode. 18. The semiconductor device according to claim 15, wherein the second transistor is OFF for a predetermined time period if a pulse signal having a voltage that is equal to or higher than a predetermined voltage is supplied to the gate electrode of the second transistor. 19. The semiconductor device according to claim 15, wherein the second transistor is switched to an ON state from an OFF state after a predetermined time period, if a pulse signal having a voltage that is equal to or higher than a predetermined voltage is supplied to the gate electrode of the transistor.
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이 특허에 인용된 특허 (3)
Tihanyi,Jenoe, Circuit arrangement having a load transistor and a voltage limiting circuit and method for driving a load transistor.
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