Input/output connection device, information processing device, and method for inspecting input/output device
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H04L-012/26
G06F-013/42
G06F-013/20
G06F-003/00
출원번호
US-0047137
(2011-03-14)
등록번호
US-8867369
(2014-10-21)
우선권정보
JP-2010-059979 (2010-03-16)
발명자
/ 주소
Sato, Mitsuru
출원인 / 주소
Fujitsu Limited
대리인 / 주소
Staas & Halsey LLP
인용정보
피인용 횟수 :
0인용 특허 :
2
초록▼
An input/output connection device includes a generating section which generates an inspection packet that has a tag that uniquely identifies the packet, a transmitting section which transmits the inspection packet to the input/output device, a receiving section which receives a packet, a first deter
An input/output connection device includes a generating section which generates an inspection packet that has a tag that uniquely identifies the packet, a transmitting section which transmits the inspection packet to the input/output device, a receiving section which receives a packet, a first determining section which determines, on the basis of a tag of the packet received by the receiving section, whether or not the received packet is a packet transmitted in response to the inspection packet transmitted by the transmitting section, and a second determining section which analyzes the received packet and determines whether or not the input/output device is normal when the first determining section determines that the received packet is the packet transmitted in response to the inspection packet.
대표청구항▼
1. An input/output connection device connecting a CPU and at least one input/output device, the CPU transmitting a first packet with a first tag, the input/output connection device comprising: a generating section configured to generate a second packet with a second tag;a transmitting section config
1. An input/output connection device connecting a CPU and at least one input/output device, the CPU transmitting a first packet with a first tag, the input/output connection device comprising: a generating section configured to generate a second packet with a second tag;a transmitting section configured to transmit the first packet transmitted from the CPU and the second packet to the at least one input/output device, the transmitting section determining whether or not the first tag added to the first packet has a same value as the second tag added to the second packet, the transmitting section transmitting the first packet to the at least one input/output device when the first tag and the second tag have different values, the transmitting section not transmitting the first packet to the at least one input/output device when the first tag has the same value as the second tag;a receiving section configured to receive a third packet with a third tag and a fourth packet with a fourth tag from the at least one input/output device as response packets to the first packet and the second packet, respectively;a first determining section configured to determine the third packet and the fourth packet, based on the third tag and the fourth tag; anda second determining section configured to analyze the fourth packet so as to detect a failure of the at least one input/output device. 2. The input/output connection device according to claim 1, wherein when the at least one input/output device has an advanced error reporting (AER) register standardized by PCI Express, the transmitting section transmits the second packet to the AER register. 3. The input/output connection device according to claim 1, wherein when the second determining section detects a non-failure of the at least one input/output device, the transmitting section transmits, to the at least one input/output device, the first packet not transmitted. 4. The input/output connection device according to claim 1, wherein when the transmitting section determines that the first tag has the same value as the second tag, the transmitting section rewrites the first tag added to the first packet received from the CPU and transmits, to the at least one input/output device, the first packet that has the rewritten tag. 5. The input/output connection device according to claim 1, wherein the at least one input/output connection device in which the failure is detected is disconnected from control of the input/output connection device. 6. The input/output connection device according to claim 5, wherein when the at least one input/output device in which the failure is detected is duplicated, the active input/output device in which the failure is detected is disconnected from the control of the input/output connection device and a spare input/output device is controlled by the input/output connection device. 7. The input/output connection device according to claim 1, wherein the first determining section determines the third packet and the fourth packet, based on whether the third tag and the fourth tag have the same value as the first tag and the second tag, respectively. 8. The input/output connection device according to claim 1, further comprising: a storage section configured to store information on the second tag,wherein the second tag is added to the second packet for inspecting the input/output device. 9. An information processing apparatus connecting a CPU and at least one input/output device, the CPU transmitting a first packet with a first tag, the information processing apparatus comprising: a generating section configured to generate a second packet with a second tag;a transmitting section configured to transmit the first packet transmitted from the CPU and the second packet to the at least one input/output device, the transmitting section determining whether or not the first tag added to the first packet has a same value as the second tag added to the second packet, the transmitting section transmitting the first packet to the at least one input/output device when the first tag and the second tag have different values, the transmitting section not transmitting the first packet to the at least one input/output device when the first tag has the same value as the second tag;a receiving section configured to receive a third packet with a third tag and fourth packet with a fourth tag from the at least one input/output device as response packets to the first packet and the second packet, respectively;a first determining section configured to determine the third packet and the fourth packet, based on the third tag and the fourth tag; anda second determining section configured to analyze the fourth packet so as to detect a failure of the at least one input/output device. 10. A method for inspecting an input/output device executed by an input/output connection device connecting a CPU and at least one input/output device the CPU transmitting a first packet with a first tag, the method comprising: generating a second packet with a second tag;transmitting the first packet transmitted from the CPU and the second packet to the at least one input/output device, the transmitting determining whether or not the first tag added to the first packet has a same value as the second tag added to the second packet, the transmitting transmitting the first packet to the at least one input/output device when the first tag and the second tag have different values, the transmitting not transmitting the first packet to the at least one input/output device when the first tag has the same value as the second tag;receiving a third packet with a third tag and a fourth packet with a fourth tag from the at least one input/output device as response packets to the first packet and the second packet, respectively;determining the third packet and the fourth packet, based on the third tag and the fourth tag; andanalyzing the fourth packet so as to detect a failure of the at least one input/output device.
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이 특허에 인용된 특허 (2)
Kloeppner, John R., Posted memory write verification.
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