초록 ▼

It is intended to solve a problem of increase in power consumption and reduction in operating speed due to an increase in parasitic capacitance of a surrounding gate transistor (SGT) as a three-dimensional semiconductor device, to provide an SGT achieving an increase in speed and power consumption r

It is intended to solve a problem of increase in power consumption and reduction in operating speed due to an increase in parasitic capacitance of a surrounding gate transistor (SGT) as a three-dimensional semiconductor device, to provide an SGT achieving an increase in speed and power consumption reduction in a semiconductor circuit. The semiconductor device comprises a second-conductive type impurity region (510) formed in a part of a first-conductive type semiconductor substrate (100), a first silicon pillar (810) of an arbitrary cross-sectional shape formed on the second-conductive type impurity region, a first insulating body (310) surrounding a part of a surface of the first silicon pillar, a gate (210) surrounding the first insulating body, and a second silicon pillar (820) which is formed on the first silicon pillar and which includes a second-conductive type impurity region (540). The gate is disposed to be separated from the semiconductor substrate by a second insulating body and is disposed to be separated from the second silicon pillar by the second insulating body. The capacitance between the gate and the semiconductor substrate is less than a gate capacitance, and the capacitance between the gate and the second silicon pillar is less than the gate capacitance.

대표청구항 ▼

1. A semiconductor device comprising: a first-conductive type semiconductor substratea second-conductive type impurity region formed in a part of the first-conductive type semiconductor substrate;a first silicon pillar of an arbitrary cross-sectional shape formed on the second-conductive type impuri

1. A semiconductor device comprising: a first-conductive type semiconductor substratea second-conductive type impurity region formed in a part of the first-conductive type semiconductor substrate;a first silicon pillar of an arbitrary cross-sectional shape formed on the second-conductive type impurity region;a first insulating body surrounding a part of a surface of the first silicon pillar;a gate surrounding the first insulating body;a second silicon pillar which is formed on the first silicon pillar and which includes a second-conductive type impurity region and a diameter of the second silicon pillar being wider than a diameter of the first silicon pillar,a second insulating body surrounding a remaining surface of the first silicon pillar which is not surrounded by the first insulating body, the second insulating body surrounding the gate and the second silicon pillar,wherein the first silicon pillar includes a second-conductive type high-concentration impurity region adjacent the second-conductive type impurity region formed in the part of the semiconductor substrate, and a second-conductive type high-concentration impurity region adjacent the second silicon pillar;wherein:the gate is disposed to be separated from the semiconductor substrate by the second insulating body and is disposed to be separated from the second silicon pillar by the second insulating body; andthe capacitance between the gate and the semiconductor substrate is less than a gate capacitance, or the capacitance between the gate and the second silicon pillar is less than the gate capacitance. 2. The semiconductor device according to claim 1, wherein a cross-sectional area (unit: nm2) of the gate is less than a value derived by multiplying a distance (unit: nm) between the gate and the semiconductor substrate separated by the second insulating body, by 2×109, or is less than a value derived by multiplying the distance (unit: nm) between the gate and the second silicon pillar separated by the second insulating body, by 2×109. 3. The semiconductor device according to claim 1, wherein: a thickness Tgate1 (unit: μm) of one of opposite ends of the gate and a distance Tspace1 (unit: μm) between the gate and the semiconductor substrate separated by the second insulating body satisfy the following relational expression: 2.0e6·Tspace1>πTgate12+1.0e2Tgate1; orthe thickness Tgate2 (unit: μm) of the other end of the gate, and a distance Tspace2 (unit: μm) between the gate and the second silicon pillar separated by the second insulating body, satisfy the following relational expression: 2.0e6·Tspace1>πTgate12+1.0e2Tgate1. 4. The semiconductor device according to claim 1, wherein: the first silicon pillar is comprised of a cross-sectionally square-shaped silicon pillar; andeach of the first insulating body surrounding the part of the surface of the first silicon pillar and the gate surrounding the first insulating body has a cross-sectionally square shape. 5. The semiconductor device according to claim 4, wherein: a thickness Tgate1 (unit: μm) of one of opposite ends of the gate and a distance Tspace1 (unit: μm) between the gate and the semiconductor substrate separated by the second insulating body satisfy the following relational expression: 2.0e6·Tspace1>4Tgate12+1.0e2Tgate1; orthe thickness Tgate2 (unit: μm) of the other end of the gate and a distance Tspace2 (unit: μm) between the gate and the second silicon pillar separated by the second insulating body satisfy the following relational expression: 2.0e6·Tspace1>4Tgate12+1.0e2Tgate1. 6. The semiconductor device according to claim 1, wherein: the first silicon pillar is comprised of a cross-sectionally rectangular-shaped silicon pillar; andeach of the first insulating body surrounding the part of the surface of the first silicon pillar and the gate surrounding the first insulating body has a cross-sectionally rectangular shape. 7. The semiconductor device according to claim 6, wherein: a thickness Tgate1 (unit: μm) of one of opposite ends of the gate and a distance Tspace1 (unit: μm) between the gate and the semiconductor substrate separated by the second insulating body satisfy the following relational expression: 3.0e6·Tspace1>4Tgate12+1.5e2Tgate1; orthe thickness Tgate2 (unit: μm) of the other end of the gate, and a distance Tspace2 (unit: μm) between the gate and the second silicon pillar separated by the second insulating body, satisfy the following relational expression: 3.0e6·Tspace2>4Tgate22+1.5e2Tgate2. 8. The semiconductor device according to claim 1, wherein the second insulating body is made of SiO2 or SiN, or has a layered structure of SiO2 and SiN. 9. The semiconductor device according to claim 1, wherein the first insulating body is made of one selected from the group consisting of SiO2, HfO2, and SiON. 10. The semiconductor device according to claim 1, wherein the gate is made of a material selected from the group consisting of TaN, TiN, NiSi, Ni3Si, Ni2Si, PtSi, Pt3Si, and W. 11. The semiconductor device according to claim 1, which further comprises a silicide region formed in a part of the second-conductive type impurity region formed in the part of the semiconductor substrate, and a silicide region formed in a part of a second-conductive type high-concentration impurity region of the second silicon pillar.