Modeling technique for resistive random access memory (RRAM) cells
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-017/50
G06G-007/62
G11C-013/00
출원번호
US-0077941
(2011-03-31)
등록번호
US-8930174
(2015-01-06)
발명자
/ 주소
Lu, Wei
출원인 / 주소
Crossbar, Inc.
대리인 / 주소
Ogawa P.C.
인용정보
피인용 횟수 :
1인용 특허 :
111
초록▼
Accurate simulation of two-terminal resistive random access memory (RRAM) behavior is accomplished by solving equations including state variables for filament length growth, filament width growth, and temperature. Such simulations are often run in a SPICE environment. Highly accurate models simulate
Accurate simulation of two-terminal resistive random access memory (RRAM) behavior is accomplished by solving equations including state variables for filament length growth, filament width growth, and temperature. Such simulations are often run in a SPICE environment. Highly accurate models simulate the dynamic nature of filament propagation and multiple resistive states by using a sub-circuit to represent an RRAM cell. In the sub-circuit, voltages on floating nodes control current output while the voltage dropped across the sub-circuit controls growth and temperature characteristics. Properly executed, such a sub-circuit can accurately model filament growth at all phases of conductance including dynamic switching and a plurality of resistive states.
대표청구항▼
1. A computer-implemented method for modeling a circuit including a resistive random access memory (RRAM) cell in a computer system programmed to perform the method, the method comprising: implementing in the computer system, a circuit simulation environment;displaying on a display of the computer s
1. A computer-implemented method for modeling a circuit including a resistive random access memory (RRAM) cell in a computer system programmed to perform the method, the method comprising: implementing in the computer system, a circuit simulation environment;displaying on a display of the computer system within the circuit simulation environment, a circuit including at least one RRAM cell, the RRAM cell being associated with a first internal state variable;retrieving from a memory of the computer system within the circuit simulation environment, a sub-circuit module compatible with the circuit simulation environment, that represents behavior of the RRAM cell comprising a first component that corresponds to a formula for determining the first internal state variable;determining in the computer system within the circuit simulation environment, a characteristic of the RRAM cell within the circuit in response to the sub-circuit module compatible with the circuit simulation environment by solving the formula for the first internal state variable and obtaining a value representing the characteristic of the RRAM cell;updating the display of the computer system to include at least the value representing the characteristic of the RRAM cell;receiving in the computer system within the circuit simulation environment, modifications to the circuit to form an adjusted circuit in response to the characteristic of the circuit; andstoring in the memory of the computer system, the adjusted circuit. 2. The method of claim 1, wherein the first internal state variable is represented by a simulated electrical component within the computer system. 3. The method of claim 2, wherein the simulated electrical component is selected from a group consisting of: a current source, voltage source, capacitor, inductor, resistor, transistor, and diode. 4. The method of claim 1, wherein the formula includes a formula representing dynamic length growth of a filament in the RRAM. 5. The method of claim 4, wherein the formula further includes a formula representing dynamic width growth of the filament in the RRAM. 6. The method of claim 5, wherein the formula representing the dynamic width growth is modeled by simulating a plurality of filaments. 7. The method of claim 5, wherein the formula representing dynamic width growth is modeled by varying a lateral dimension of the filament. 8. The method of claim 5, wherein the formula representing the dynamic width growth of the filament: dw/dt is represented by the equation: ⅆwⅆt=λ[exp(η1V)-exp(-η2V)],wherein λwherein η1 is an activation energy under a positive bias,wherein η2 is an activation energy under a negative bias,wherein V is an applied voltage. 9. The method of claim 4, wherein the formula representing the dynamic length growth of the filament: dl/dt is represented by the equation: dτ0exp(-UaVthermal)(sinh(VV0))wherein d is distance between impurities,wherein τ0 is an ion hop attempt frequency,wherein Ua is activation energy,wherein Vthermal=kT/q,wherein k is Boltzmann's constant in Joules/Kelvin,wherein T is temperature in Kelvin,wherein q is charge on an electron,wherein V is an applied voltage,wherein V0=2Vthermal(h−l)/d,wherein h is distance between electrodes, andwherein l is filament length. 10. The method of claim 1, wherein the behavior of the RRAM is selected from a group consisting of: hysteretic growth behavior, separate length growth and width growth phases. 11. The method of claim 1, wherein the formula for determining the first internal state variable includes a temperature characteristic. 12. The method of claim 1, wherein the behavior of the RRAM cell is characterized by a resistance state from a set of three or more possible resistance states for the RRAM cell. 13. The method of claim 1, wherein the RRAM cell is associated with a second internal state variable;wherein the first internal variable is associated with a length growth of a filament of the RRAM; andwherein the second internal variable is associated with a width growth of the filament of the RRAM. 14. The method of claim 1, wherein the circuit simulation environment comprises a Simulation Program with Integrated Circuit Emphasis (SPICE) environment.
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