Method for providing near-hermetically coated integrated circuit assemblies
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H05K-003/34
H05K-003/00
출원번호
US-0055746
(2013-10-16)
등록번호
US-8935848
(2015-01-20)
발명자
/ 주소
Boone, Alan P.
Lower, Nathan P.
Wilcoxon, Ross K.
출원인 / 주소
Rockwell Collins, Inc.
대리인 / 주소
Suchy, Donna P.
인용정보
피인용 횟수 :
0인용 특허 :
116
초록▼
The present invention is a method for providing an integrated circuit assembly, the integrated circuit assembly including an integrated circuit and a substrate. The method includes mounting the integrated circuit to the substrate. The method further includes, during assembly of the integrated circui
The present invention is a method for providing an integrated circuit assembly, the integrated circuit assembly including an integrated circuit and a substrate. The method includes mounting the integrated circuit to the substrate. The method further includes, during assembly of the integrated circuit assembly, applying a low processing temperature, at least near-hermetic, glass-based coating directly to the integrated circuit and a localized interconnect interface, the interface being configured for connecting the integrated circuit to at least one of the substrate and a second integrated circuit of the assembly. The method further includes curing the coating. Further, the integrated circuit may be a device which is available for at least one of sale, lease and license to a general public, such as a Commercial off the Shelf (COTS) device. Still further, the coating may promote corrosion resistance and reliability of the integrated circuit assembly.
대표청구항▼
1. A method for providing an integrated circuit assembly, the integrated circuit assembly including an integrated circuit and a substrate, the method comprising: mounting the integrated circuit to the substrate,during assembly of the integrated circuit assembly, applying a low processing temperature
1. A method for providing an integrated circuit assembly, the integrated circuit assembly including an integrated circuit and a substrate, the method comprising: mounting the integrated circuit to the substrate,during assembly of the integrated circuit assembly, applying a low processing temperature, at least near-hermetic, glass-based coating directly to the integrated circuit and a localized interconnect interface, the interface being configured for connecting the integrated circuit to at least one of the substrate and a second integrated circuit of the assembly; andcuring the coating. 2. The method of claim 1, wherein the substrate is a chip carrier. 3. The method of claim 1, wherein the localized interconnect interface is a bond wire-bond pad interface, the bond wire-bond pad interface including at least one of a bond wire and a bond pad. 4. The method of claim 1, wherein the glass-based coating is an alkali silicate-based coating. 5. The method of claim 1, wherein the integrated circuit is a Commercial off the Shelf (COTS) device. 6. The method of claim 1, further comprising: prior to applying the coating, adding nanoparticles to the coating for promoting corrosion resistance of at least one of the assembly and the coating. 7. The method of claim 1, wherein the steps of applying and curing are performed at a temperature at least one of less than 160 degrees Celsius and equal to 160 degrees Celsius. 8. The method of claim 1, wherein the substrate is a printed circuit board. 9. A method for providing an electronic device, the electronic device including an integrated circuit assembly, the integrated circuit assembly including an integrated circuit and a substrate, the method comprising: mounting the integrated circuit to the substrate;during assembly of the integrated circuit assembly, applying a low processing temperature, at least near-hermetic, glass-based coating directly to the integrated circuit and a localized interconnect interface, the interface being configured for connecting the integrated circuit to at least one of the substrate and a second integrated circuit of the assembly;curing the coating; andat least substantially enclosing the integrated circuit assembly within a housing. 10. The method of claim 9, wherein the substrate is a chip carrier. 11. The method of claim 9, wherein the localized interconnect interface is a bond wire-bond pad interface, the bond wire-bond pad interface including at least one of a bond wire and a bond pad. 12. The method of claim 9, wherein the glass-based coating is an alkali silicate-based coating. 13. The method of claim 9, wherein the integrated circuit is a Commercial off the Shelf (COTS) device. 14. The method of claim 9, further comprising: prior to applying the coating, adding nanoparticles to the coating for promoting corrosion resistance of at least one of the assembly and the coating. 15. The method of claim 9, wherein the steps of application and curing are performed at a temperature at least one of less than 160 degrees Celsius and equal to 160 degrees Celsius. 16. The method of claim 1, wherein the substrate comprises at least one of a ceramic material, a plastic material, and an epoxy material. 17. The method of claim 1, wherein the substrate comprises a plastic material. 18. The method of claim 9, wherein the substrate comprises at least one of a ceramic material, a plastic material, and an epoxy material. 19. The method of claim 1, further comprising forming the glass-based coating from an alkali metal oxide and a silicon dioxide. 20. The method of claim 9, further comprising forming the glass-based coating from an alkali metal oxide and a silicon dioxide.
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