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다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
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Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
|
출원번호 | US-0555152 (2012-07-22) |
등록번호 | US-8975670 (2015-03-10) |
발명자 / 주소 |
|
출원인 / 주소 |
|
인용정보 | 피인용 횟수 : 1 인용 특허 : 335 |
A semiconductor device, including: a semiconductor substrate with a first layer including first transistors; a shield layer overlaying the first layer; a second layer overlaying the shield layer, the second layer including second transistors; wherein the shield layer is a mostly continuous layer wit
A semiconductor device, including: a semiconductor substrate with a first layer including first transistors; a shield layer overlaying the first layer; a second layer overlaying the shield layer, the second layer including second transistors; wherein the shield layer is a mostly continuous layer with a plurality of regions for connections between the first transistors and the second transistors, and where the second transistors include monocrystalline regions.
1. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous l
1. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said second transistors comprise monocrystalline regions. 2. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors; andat least one interconnect layer between said first layer and said shield layer, wherein said at least one interconnect layer comprises aluminum or copper. 3. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors; andat least one interconnect layer between said first layer and said shield layer, wherein said shield layer thickness is at least 2 times larger than said interconnection layer thickness. 4. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors; anda thermal conductive path between said shield layer and said semiconductor substrate, wherein said thermal conductive path has a thermal conductivity greater than about 10W/m-K. 5. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is designed to protect said first transistors from damage due to an optical annealing process used for processing of said second transistors. 6. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is designed to protect said first transistors from damage due to an annealing process used for processing of said second transistors. 7. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is designed to protect said first transistors from electro-magnetic radiation coming from said second transistors. 8. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is designed to protect said second transistors from electro-magnetic radiation coming from said first transistors. 9. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is part of power delivery to said second transistors. 10. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is designed to spread heat generated by said second transistors. 11. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer is designed to spread heat generated by an optical annealing process used for the processing of said second transistors. 12. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer comprises copper or aluminum or tungsten. 13. A semiconductor device, comprising: a semiconductor substrate with a first layer comprising first transistors;a shield layer overlaying said first layer;a second layer overlaying said shield layer, said second layer comprising second transistors, wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, andwherein said shield layer comprises materials with a thermal conductivity greater than about 10 W/m-K.
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