초록 ▼

A semiconductor wafer contains a plurality of semiconductor die. A plurality of interconnect bump pads is formed over the semiconductor die. A plurality of sacrificial bump pads is formed in proximity to and diagonally offset with respect to the interconnect bump pads. The sacrificial bump pads have

A semiconductor wafer contains a plurality of semiconductor die. A plurality of interconnect bump pads is formed over the semiconductor die. A plurality of sacrificial bump pads is formed in proximity to and diagonally offset with respect to the interconnect bump pads. The sacrificial bump pads have a different diameter than the interconnect bump pads. A conductive link is formed between each interconnect bump pad and proximate sacrificial bump pad. The sacrificial bump pads, interconnect bump pads, and conductive link are formed concurrently or during bump formation. The wafer is electrically tested by contacting the sacrificial bump pads. The electrical test identifies known good die and defective die. The sacrificial bump pads and a portion of the conductive link are removed after wafer probing. Bumps are formed over the interconnect bump pads. The semiconductor wafer can be sold or transferred to a third party after wafer probing without bumps.

대표청구항 ▼

1. A method of making a semiconductor device, comprising: providing a semiconductor wafer including a plurality of semiconductor die;forming a plurality of interconnect bump pads over the semiconductor die;forming a plurality of sacrificial bump pads in proximity to the interconnect bump pads and ov

1. A method of making a semiconductor device, comprising: providing a semiconductor wafer including a plurality of semiconductor die;forming a plurality of interconnect bump pads over the semiconductor die;forming a plurality of sacrificial bump pads in proximity to the interconnect bump pads and over an active surface of the semiconductor die;forming a conductive link between each interconnect bump pad and proximate sacrificial bump pad;wafer probing including directly contacting the sacrificial bump pads while leaving a surface of the interconnect bump pads exposed; andtransferring the semiconductor wafer to a third party after wafer probing without bumps. 2. The method of claim 1, further including forming a plurality of bumps over the interconnect bump pads. 3. The method of claim 2, further including concurrently forming the sacrificial bump pads, interconnect bump pads, and conductive link. 4. The method of claim 1, further including disposing the sacrificial bump pads in a location diagonally offset with respect to the interconnect bump pads. 5. The method of claim 1, further including removing the sacrificial bump pads and a portion of the conductive link after wafer probing. 6. The method of claim 1, wherein the sacrificial bump pads include a width different from a width of the interconnect bump pads. 7. A method of making a semiconductor device, comprising: providing a semiconductor wafer including a plurality of semiconductor die;concurrently forming a plurality of interconnect bump pads, conductive links, and a plurality of sacrificial bump pads over an active surface of the semiconductor die, the sacrificial bump pads being disposed in proximity to the interconnect bump pads, the conductive links being electrically connected between each interconnect bump pad and proximate sacrificial bump pad;wafer probing by directly contacting the sacrificial bump pads while the interconnect bump pads are devoid of bump material; andtransferring the semiconductor wafer to a third party after wafer probing without bumps. 8. The method of claim 7, further including removing a portion of the conductive links. 9. The method of claim 7, further including forming a plurality of bumps over the interconnect bump pads. 10. The method of claim 7, further including disposing the sacrificial bump pads in a location diagonally offset with respect to the interconnect bump pads. 11. The method of claim 7, further including removing the sacrificial bump pads and a portion of the conductive links after wafer probing. 12. The method of claim 7, wherein the sacrificial bump pads include a width different from a width of the interconnect bump pads. 13. A method of making a semiconductor device, comprising: providing a semiconductor wafer including a plurality of semiconductor die;forming an interconnect bump pad over the semiconductor die within a bump pad array;forming a sacrificial bump pad within the bump pad array electrically connected to the interconnect bump pad;wafer probing by contacting the sacrificial bump pad without contacting the interconnect bump pad while leaving a surface of the interconnect bump pad exposed; andremoving the sacrificial bump pad by an etching process while the surface of the interconnect bump pad remains exposed. 14. The method of claim 13, further including forming a conductive link between the interconnect bump pad and the sacrificial bump pad. 15. The method of claim 14, further including removing a portion of the conductive link after wafer probing. 16. The method of claim 14, further including concurrently forming the sacrificial bump pad, interconnect bump pad, and conductive link. 17. The method of claim 13, further including forming a bump over the interconnect bump pad. 18. The method of claim 13, further including disposing the sacrificial bump pad in a location diagonally offset with respect to the interconnect bump pad. 19. A method of making a semiconductor device, comprising: providing a semiconductor wafer containing a plurality of semiconductor die;forming an interconnect bump pad over the semiconductor die within a bump pad array;forming a sacrificial bump pad within the bump pad array;forming a conductive link between the interconnect bump pad and sacrificial bump pad;wafer probing by electrically contacting the sacrificial bump pad; andtransferring the semiconductor wafer to a third party after wafer probing without bumps.