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A method of manufacturing a sensor for in vivo applications includes the steps of providing two wafers of an electrically insulating material. A recess is formed in the first wafer, and a capacitor plate is formed in the recess of the first wafer. A second capacitor plate is formed in a correspondin

A method of manufacturing a sensor for in vivo applications includes the steps of providing two wafers of an electrically insulating material. A recess is formed in the first wafer, and a capacitor plate is formed in the recess of the first wafer. A second capacitor plate is formed in a corresponding region of the second wafer, and the two wafers are affixed to one another such that the first and second capacitor plates are arranged in parallel, spaced-apart relation.

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1. A method of manufacturing a sensor for in vivo applications, comprising the steps of: providing first and second wafers of a low-loss-tangent dielectric material;forming a recess in the first wafer;forming at least one capacitor plate in the recess of the first wafer;forming at least one capacito

1. A method of manufacturing a sensor for in vivo applications, comprising the steps of: providing first and second wafers of a low-loss-tangent dielectric material;forming a recess in the first wafer;forming at least one capacitor plate in the recess of the first wafer;forming at least one capacitor plate on the second wafer;mutually imposing the first and second wafers; andaffixing the first and second wafers to one another in the mutually imposed position by using a highly focused energy source to operatively apply energy from the energy source to selected portions of the first and second wafers at a selected energy level effective to cut and fuse the wafers together while preventing heat damage to adjacent internal components of the sensor, wherein the highly focused energy source cuts the mutually imposed wafers to a desired size and hermetically fuses the first and second wafers together about a fused peripheral edge to form a unitary sensor body. 2. The method of claim 1, comprising the further step of: providing an inductor coil having first and second leads;electrically coupling the first lead of the inductor coil to at least a portion of the at least one capacitor plate of the first wafer; andelectrically coupling the second lead of the inductor coil to a location selected from the group comprising at least a portion of the at least one capacitor plate of the first wafer and at least a portion of the at least one capacitor plate of the second wafer. 3. The method of claim 2, wherein the inductor coil is immobilized with respect to at least the at least one capacitor plate of the first wafer and changes in coil configuration, and wherein an upper surface of the second wafer defines a coil receiving trench. 4. The method of claim 3, where the method for coil immobilization comprises using wire of sufficient strength so the coil does not shift position relative to the at least one capacitor plate of the first wafer. 5. The method of claim 3, where the method for coil immobilization comprises using a coil formed on a bobbin. 6. The method of claim 5, where the bobbin is comprised of a thermoplastic material and heated to encapsulate and/or adhere to the surface of the coil receiving trench. 7. The method of claim 5, where the bobbin is press fit to at least one surface of the coil receiving trench. 8. The method of claim 3, where the method for coil immobilization comprises use of a thermosetting or thermoplastic material applied to a pre-formed coil to impart additional stability to the coil. 9. The method of claim 8, where a thermosetting polymer is applied to at least one space between the coil and the coil receiving trench in liquid form and cured. 10. The method of claim 8, where at least one thermoplastic preform is inserted and heated to fill the gap between at least one space between the coil and the coil receiving trench. 11. The method of claim 1, further comprising the step of reducing the thickness of the first wafer underlying at least a portion of capacitor plate of the first wafer. 12. The method of claim 1, wherein the step of providing first and second wafers of a low-loss-tangent dielectric material comprises the step of providing first and second wafers of a material selected from the group comprising fused silica, quartz, Pyrex, and sintered zirconia. 13. The method of claim 1, wherein the step of affixing the first and second wafers to one another further comprises the step of bonding the first and second wafers together using glass frit. 14. The method of claim 1, wherein the step of affixing the first and second wafers to one another comprises the step of adhering the wafers to one another. 15. The method of claim 1, wherein the step of forming at least one capacitor plate in the recess of the first wafer comprises the step of electroplating. 16. The method of claim 15, comprising the further step, subsequent to the step of electroplating, of polishing the at least one metal region using chemical/mechanical polishing to effect at least one of planarizing and reducing the height of the at least one capacitor plate. 17. The method of claim 15, comprising the further step, subsequent to the step of electroplating, of chemically etching the at least one metal region by a selective etchant to reduce the height of the at least one capacitor plate. 18. The method of claim 1, wherein the step of forming the at least one capacitor plate in the recess of the first wafer comprises the step of using physical vapor deposition to deposit a layer of metal. 19. The method of claim 9, comprising the further steps, subsequent to the step of using physical vapor deposition, of: applying photoresist over at least a portion of the layer of metal;using a mask to pattern the photoresist; andselectively etching exposed portions of the photoresist to define a desired pattern. 20. The method of claim 1, wherein the at least one capacitor plate of the first wafer and the at least one capacitor plate of the second wafer are spaced apart by a distance of from 0.1 to 10 micrometers. 21. The method of claim 1, wherein the at least one capacitor plate of the first wafer and the at least one capacitor plate of the second wafer are spaced apart by a distance of from 0.1 to 2 micrometers. 22. The method of claim 1, comprising the further step of mutually imposing the first and second wafers such that at least a portion of the at least one capacitor plate of the first wafer and the at least one capacitor plate of the second wafer are arranged in parallel, spaced-apart relation. 23. The method of claim 1, wherein the highly focused energy source is a laser. 24. The method of claim 23, wherein the step of controlling the highly focused energy source further comprises controlling the laser to have a peak wavelength of approximately 10 micrometers when the wafers are comprised of fused silica.