Low temperature fabrication method for a three-dimensional memory device and structure
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-029/02
G11C-013/00
H01L-027/102
출원번호
US-0434567
(2012-03-29)
등록번호
US-9087576
(2015-07-21)
발명자
/ 주소
Herner, Scott Brad
출원인 / 주소
Crossbar, Inc.
대리인 / 주소
Amin, Turocy & Watson, LLP
인용정보
피인용 횟수 :
0인용 특허 :
121
초록▼
A non-volatile memory device structure. The device structure includes a first electrode, a second electrode and a state change material sandwiched between the first electrode and the second electrode. In a specific embodiment, the first electrode includes a p+ type polycrystalline silicon material o
A non-volatile memory device structure. The device structure includes a first electrode, a second electrode and a state change material sandwiched between the first electrode and the second electrode. In a specific embodiment, the first electrode includes a p+ type polycrystalline silicon material or a p+ type silicon germanium material. The state change material includes an n− type zinc oxide material. The second electrode includes a doped zinc oxide material. The doped zinc oxide material can be B2O3:ZnO, In2O3:ZnO, Al2O3:ZnO or Ga2O3:ZnO. The n− type zinc oxide material and the p+ type silicon material (or p+ polycrystalline silicon germanium material) further form a diode device or steering device for the non-volatile memory device.
대표청구항▼
1. A non-volatile memory device structure comprising: a first wiring structure;a first p type semiconductor material overlying the first wiring structure;a first n− type state change semiconductor material overlying the first p type semiconductor material, the first n− type state change semiconducto
1. A non-volatile memory device structure comprising: a first wiring structure;a first p type semiconductor material overlying the first wiring structure;a first n− type state change semiconductor material overlying the first p type semiconductor material, the first n− type state change semiconductor material having a resistance change characteristic, wherein the first n− type state change semiconductor material comprises a zinc oxide;a first steering device formed from the first p type semiconductor material and the first n− type state change semiconductor material;a first n+ type active conductive material overlying the first n− type state change semiconductor material, wherein the n+ type active conductive material comprises an aluminum doped zinc oxide material;a first resistive switching device formed from the first n+ type active conductive material, the first n− type state change semiconductor material and the first wiring structure; anda second wiring structure overlying the first n+ type active conductor material. 2. The device of claim 1 wherein the first p type semiconductor material and the first n− type state change semiconductor material form a steering device serially and operably coupled to the resistive switching device. 3. The device of claim 1 wherein the first p− type semiconductor material is selected from a group consisting of: a p+ polycrystalline silicon germanium material, a p+ type polycrystalline silicon material, and a p+ type single crystal silicon material. 4. The device of claim 1 wherein the first n− type state change semiconductor material is characterized by an electrical resistance modulated by an electric field in the first n− type state change semiconductor material. 5. The device of claim 1 further comprises: a second n+ type active conductive material overlying the second wiring structure, wherein the second n+ type active conductive material comprises an aluminum doped zinc oxide material;a second n− type state change semiconductor material overlying the second n+ type active conductive material, the second n− type state change semiconductor material having a state change characteristic, wherein the second n− type state change semiconductor material comprises a zinc oxide;a second p type semiconductor material overlying the second n− type state change semiconductor material;a second steering device formed from the second n− type state change semiconductor material and the second p type semiconductor material;a third wiring structure overlying the second p type semiconductor material; anda second resistive switching device formed from at least the second n+ type active conductive material, the second n− type state change semiconductor material, and the third wiring material. 6. The device of claim 5 wherein the second n+ type active conductor material is selected from a group consisting of: aluminum doped zinc oxide material (AZO), gallium oxide material, gallium oxide doped zinc oxide material (Ga2O3:ZnO), boron oxide doped zinc oxide material (B2O3:ZnO), indium oxide doped zinc oxide material (In2O3:ZnO), or a combination thereof. 7. The device of claim 5 wherein the second n− type state change semiconductor material is selected from a group consisting of: zinc oxide material, zinc oxide material that is not deliberately doped, indium oxide material, indium oxide doped with tin oxide. 8. The device of claim 5 wherein the first n− type state change semiconductor material comprises tin oxide, where the tin oxide is doped with fluorine or antimony. 9. The device of claim 5 wherein the second p type semiconductor material comprises a p+ type polycrystalline silicon germanium material. 10. A method of forming a non-volatile memory device, comprising: providing a first wiring structure;forming a p type semiconductor material comprising a silicon bearing material overlying the first wiring structure;forming a first resistive switching material having an n− type state change semiconductor impurity characteristic overlying the first p type semiconductor material, the resistive switching material comprising a zinc oxide material;forming an n+ conductive material overlying the first resistive switching material having an n+ type state change semiconductor impurity characteristic, wherein the n+ conductive material comprises an aluminum doped zinc oxide material;forming a p-n junction region and a first steering device from the p type semiconductor material and the first resistive switching material having the n− type state change semiconductor impurity characteristic;forming a first resistive switching device from at least the first wiring structure, the first resistive switching material having the n− type state change semiconductor impurity characteristic, and the n+ conductive material, the resistive switching device being serially coupled to the steering device; andforming a second wiring structure overlying the n+ conductive material. 11. The method of claim 10 wherein the silicon bearing material is selected from a group consisting of: p+ polysilicon material, a p+ single crystal material, a p+ polycrystalline silicon germanium material. 12. The method of claim 11 wherein forming the p type semiconductor material comprises forming a p+ silicon germanium material by a chemical vapor deposition process using disilane (Si2H6), germane (GeH4) and diborane (B2H6) as precursors, or by a chemical vapor deposition process using disilane (Si2H6), germane (GeH4) and boron chloride (BC16) as precursors. 13. The method of claim 10 wherein forming the first resistive switching device and forming the steering device further comprises forming a pillar structure from at least the n+ conductive material, the first resistive switching material having an n− type state change semiconductor impurity characteristic, and the p type semiconductor material. 14. The method of claim 10 wherein the first resistive switching material is selected from a group consisting of: a zinc oxide material, a zinc oxide material that is not intentionally doped. 15. The method of claim 10 wherein the aluminum doped zinc oxide material is formed by a physical vapor deposition process using a DC magnetron at a deposition temperature ranging from about 25 Degree Celsius to no greater than about 100 Degree Celsius. 16. The method of claim 14 wherein the zinc oxide material is characterized by a resistance that has been modified by a transient electric field. 17. The method of claim 14 wherein the zinc oxide material is deposited using a method selected from a group consisting of: a physical vapor deposition process using radio frequency as an energy source from a zinc oxide target material at a deposition temperature ranging from about 25 Degree Celsius to no greater than about 100 Degree Celsius,a physical vapor deposition process form a zinc target material in an oxygen environment,a chemical vapor deposition process,deposited using a liquid precursor, anddeposited using an atomic layer deposition (ALD) process. 18. The method of claim 10 further comprises: forming a second n+ conductive material overlying the second wiring structure;forming a second resistive switching material having an n− type state change semiconductor impurity characteristic overlying the second n+ conductive material;forming a second p type semiconductor material comprising a silicon bearing material overlying the second resistive switching material;forming a third wiring structure overlying the p type semiconductor material comprising a silicon bearing material;forming a second p-n junction region and a second steering device from the second resistive switching material having an n− type state change semiconductor impurity characteristic and the second p type semiconductor material;forming a second resistive switching device from at least the third wiring structure, the second resistive switching material having the n− type state change semiconductor impurity characteristic, and the second n+ conductive material, the second resistive switching device being serially coupled to the second steering device.
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