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System and device for determining electric voltages 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G01N-027/416
  • H03M-001/12
  • H03M-001/38
  • G01R-019/165
  • G01R-031/36
  • G01R-019/25
  • H03M-001/10
  • H03M-001/14
  • H03M-001/46
  • H03M-001/56
출원번호 US-0571148 (2012-08-09)
등록번호 US-9157939 (2015-10-13)
발명자 / 주소
  • Kain, Clemens
  • Gross, Guenter
출원인 / 주소
  • Infineon Technologies AG
대리인 / 주소
    Slater & Matsil, L.L.P.
인용정보 피인용 횟수 : 1  인용 특허 : 35

초록

A method and to a system can be used for measuring electric voltages in batteries with a number of battery cells. A measuring circuit includes at least one digital analog converter that constitutes, in combination with a number of comparators, an analog digital converter to determine the electric vo

대표청구항

1. A system for measuring electric voltages in batteries with a plurality of individual battery cells, the system comprising: a digital analog converter (DAC);a plurality of comparators;wherein the DAC and the comparators are coupled together to form a measuring circuit with an analog digital conver

이 특허에 인용된 특허 (35)

  1. Uhling Thomas F. (Monument CO) Yearsley Philip J. (Colorado Springs CO) Pittock Dale L. (Colorado Springs CO) Mathews Mark E. (Colorado Springs CO), Active trim method and apparatus.
  2. Hsu Pochin,TWX, Analog-to-digital converter having multiple reference voltage comparators and boundary voltage error correction.
  3. Bae Jong Hong,KRX ; Ahn Mun Weon,KRX, Apparatus and a method for analog to digital conversion using plural reference signals and comparators.
  4. Simpson Hugh Walter (2 Kirklee Terrace Glasgow SC) Green Douglas (1 Kingsmill Drive Kennoway SC), Apparatus for making surface temperature measurements on the human body.
  5. Spinks, Stephen J.; Talbot, Andrew; Mair, Colin, Apparatus, systems and methods for for digital testing of ADC/DAC combination.
  6. Davies, Francis J., Battery cell balancing system and method.
  7. Davies, Francis J.; Graika, Jason R., Battery fault detection with saturating transformers.
  8. Sheldon Peter ; Schnizlein Paul ; Hendrickson Alan, Battery monitor with software trim.
  9. Tanigawa, Keisuke; Kobayashi, Tetsuya, Battery pack manager and method of detecting a line cut.
  10. Susak David, Capacitor array for a successive approximation register (SAR) based analog to digital (A/D) converter and method therefor.
  11. Omagari, Kazuya, Cell voltage abnormality detector and cell voltage monitoring device for a multi-cell series battery.
  12. Portmann, Clemenz; Lang, Christoph, Charge-sharing digital to analog converter and successive approximation analog to digital converter.
  13. Peterson,LuVerne; Levi,Jonathan A.; Abelovski,Paul; Mar,Roger, Digital BIST test scheme for ADC/DAC circuits.
  14. Lee, Dong-Myung; Han, Gun-Hee; Ham, Seog-Heon, Digital double sampling method, a related CMOS image sensor, and a digital camera comprising the CMOS image sensor.
  15. Kitazawa, Koji; Kurihara, Hajime; Hayakawa, Motomu; Kosuda, Tsukasa; Honda, Katsuyuki, Electronic apparatus having battery power source and control method for the electronic apparatus.
  16. Kudo, Shigetaka, Electronic apparatus, AD converter, and AD conversion method.
  17. Wilkinson John R. (Dearborn MI), Feedback-compensated ramp-type analog to digital converter.
  18. Gulczynski Zdzislaw (P.O. Box 441 Winchester MA 01890), High speed integrating analog-to-digital converter.
  19. Itkin, Yuval, Method and apparatus for testing data converters.
  20. Howe, Scott Lawrence; Ouslis, Chris, Mixed signal integrated circuit, with built in self test and method.
  21. Lee, Kyung Hoon; Choi, Michael; Shin, Eun Seok, Multi-channel sample-and-hold circuit and analog-to-digital converter using the same.
  22. Rajski, Janusz; Tyszer, Jerzy; Mrugalski, Grzegorz; Kassab, Mark; Cheng, Wu-Tung, Multi-stage test response compactors.
  23. Nittala,Srikanth; Gorbold,Jeremy; Madhavan,Mahesh, Parallel digital processing for reducing delay in SAR ADC logic.
  24. Paul Jrgen (Stutensee DEX) Pallek Anton (Baden-Baden DEX), Power supply for a redundant computer system in a control system.
  25. Hassan M. Hanjani ; Hungyu Howard Hou ; Charles Watts, Jr., Programmable low battery detector.
  26. Baker, R. Jacob, Quantizing circuits with variable parameters.
  27. Eliezer, Oren E.; Lobo, Ryan; Appel, Mark, Self-compensating digital-to-analog converter and methods of calibration and operation thereof.
  28. Horisaki, Koji, Semiconductor integrated circuit capable of screening conforming digital-analog converters and analog-digital converters to be mounted by auto-correlation arithmetic operation.
  29. Snoeij, Martijn F.; Mierop, Adrianus J.; Theuwissen, Albert J. P.; Huijsing, Johannes H., Single slope analog-to-digital converter.
  30. Lee, Jung-Ho; Lim, Sung-Sang; Kim, Yong-Woo; Choi, Michael, Successive approximation analog to digital converter and method of analog to digital conversion.
  31. Ahmad, Fazil, Successive approximation analog-to-digital converter with inbuilt redundancy.
  32. Chang, Soon-Jyh; Huang, Guan-Ying; Liu, Chun-Cheng; Huang, Chung-Ming; Lin, Jin-Fu; Huang, Chih-Haur, Successive approximation register ADC with a window predictive function.
  33. Cho, Young Kyun; Jung, Jae Ho, Successive approximation register analog-to-digital converter and operation method thereof.
  34. Lewicki, Laurence D.; Obeidat, Amjad T.; Nodenot, Nicolas, System and method for providing a clock and data recovery circuit with a self test capability.
  35. Davis William F. (Tempe AZ), Trimmable differential amplifier having a zero temperature coefficient offset voltage and method.

이 특허를 인용한 특허 (1)

  1. T, Ravi Kumar; Banerjee, Goutam; Pai, Ramesh Brahmavar, System and method for maintaining the health of a control system.
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