초록

A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.

대표청구항 ▼

1. A semiconductor manufacturing line comprising: an inert clean room containing an inert environment;a first production tool contained in the inert clean room and the inert environment, the first production tool containing a first tool environment, the first production tool including a first load l

1. A semiconductor manufacturing line comprising: an inert clean room containing an inert environment;a first production tool contained in the inert clean room and the inert environment, the first production tool containing a first tool environment, the first production tool including a first load lock, the first load lock containing a first load lock environment separate from the first tool environment, the first load lock environment being between the inert environment in the inert clean room and the first tool environment;a second production tool contained in the inert clean room and the inert environment, the second production tool containing a second tool environment, the second production tool including a second load lock, the second load lock containing a second load lock environment separate from the second tool environment, the second load lock environment being between the inert environment in the inert clean room and the second tool environment; andan interface environment unit between the inert environment in the inert clean room and an external environment, wherein the interface environment unit includes a first inert gas having an inner pressure greater than an external pressure of the external environment. 2. The semiconductor manufacturing line of claim 1, wherein the inert environment in the clean room is filled substantially with a second inert gas. 3. The semiconductor manufacturing line of claim 1, wherein the inert environment is substantially only a second inert gas, wherein the second inert gas is selected from the group consisting essentially of krypton, xenon, radon, and a combination thereof. 4. The semiconductor manufacturing line of claim 1, wherein the inert environment has a pressure of greater than one atmosphere. 5. The semiconductor manufacturing line of claim 1, wherein the inert environment is a vacuum environment. 6. The semiconductor manufacturing line of claim 1, wherein at least one of the first load lock environment and the second load lock environment is a load lock inert environment. 7. The semiconductor manufacturing line of claim 6, wherein the load lock inert environment is filled substantially with a second inert gas. 8. The semiconductor manufacturing line of claim 6, wherein the load lock inert environment has a pressure of greater than one atmosphere. 9. The semiconductor manufacturing line of claim 6, wherein the load lock inert environment is a vacuum environment. 10. The semiconductor manufacturing line of claim 1 further comprising a wafer transport channel for transporting wafers between the first production tool and the second production tool, the wafer transport channel being contained in the inert clean room and the inert environment. 11. The semiconductor manufacturing line of claim 10, wherein the wafer transport channel contains a channel inert environment, the channel inert environment being substantially only a second inert gas. 12. The semiconductor manufacturing line of claim 10, wherein the wafer transport channel contains a channel inert environment, the channel inert environment having a pressure of greater than one atmosphere. 13. The semiconductor manufacturing line of claim 10, wherein the wafer transport channel contains a channel inert environment, the channel inert environment being a vacuum environment. 14. The semiconductor manufacturing line of claim 1 further comprising a stocker configured to store a wafer, the stocker being contained in the inert clean room and the inert environment, the stocker containing a stocker inert environment in which the stocker is configured to store the wafer. 15. The semiconductor manufacturing line of claim 1, wherein the interface environment unit comprises a gateway interfacing to the inert clean room. 16. A semiconductor manufacturing line comprising: an inert clean room containing an inert environment;a first production tool contained in the inert clean room and the inert environment, the first production tool containing a first tool environment, the first production tool including a first load lock, the first load lock containing a first load lock environment separate from the first tool environment, the first load lock environment being between the inert environment in the inert clean room and the first tool environment;a second production tool contained in the inert clean room and the inert environment, the second production tool containing a second tool environment, the second production tool including a second load lock, the second load lock containing a second load lock environment separate from the second tool environment, the second load lock environment being between the inert environment in the inert clean room and the second tool environment;a holder contained in the inert clean room and the inert environment, each of the first load lock and the second load lock being configured to receive a wafer from the holder; andan interface environment unit between the inert environment in the inert clean room and an external environment, wherein the interface environment unit includes a first inert gas having an inner pressure greater than an external pressure of the external environment. 17. The semiconductor manufacturing line of claim 16, wherein the holder contains a holder inert environment, the holder inert environment being substantially only a second inert gas. 18. The semiconductor manufacturing line of claim 16, wherein the holder contains a holder inert environment, the holder inert environment having a pressure of greater than one atmosphere. 19. The semiconductor manufacturing line of claim 16, wherein the holder contains a holder inert environment, the holder inert environment being a vacuum environment. 20. A semiconductor manufacturing line comprising: an inert clean room containing an inert environment;a first production tool contained in the inert clean room and the inert environment, the first production tool containing a first tool environment, the first production tool including a first load lock, the first load lock containing a first load lock inert environment separate from the first tool environment, the first load lock inert environment being between the inert environment in the inert clean room and the first tool environment;a second production tool contained in the inert clean room and the inert environment, the second production tool containing a second tool environment, the second production tool including a second load lock, the second load lock containing a second load lock inert environment separate from the second tool environment, the second load lock environment being between the inert environment in the inert clean room and the second tool environment;a holder configured to hold a wafer, the holder containing a holder inert environment in which the holder is configured to hold the wafer, the first load lock and the second load lock being configured to interface with the holder to pass the wafer to and from the holder;a wafer transport channel configured to transport the holder between the first production tool and the second production tool, the wafer transport channel being contained in the inert clean room and the inert environment, the wafer transport channel containing a channel inert environment in which the wafer transport channel is configured to transport the holder; andan interface environment unit between the inert environment in the inert clean room and an external environment, wherein the interface environment unit includes a first inert gas having an inner pressure greater than an external pressure of the external environment.