A power device temperature monitor is provided. The power device temperature monitor includes a power device having a control terminal and an output terminal, where the output terminal is configured to output a current as directed by a voltage of the control terminal. The power device temperature mo
A power device temperature monitor is provided. The power device temperature monitor includes a power device having a control terminal and an output terminal, where the output terminal is configured to output a current as directed by a voltage of the control terminal. The power device temperature monitor includes an inductor coupled to the output terminal of the power device and an amplifier coupled to the inductor. The power device temperature monitor includes a computing device that receives an output of the amplifier, the computing device is configured to derive a temperature of the power device based upon the output of the amplifier.
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1. A power device temperature monitor, comprising: a power device having a control terminal and an output terminal, the output terminal configured to output a current as directed by a voltage of the control terminal;an inductor coupled to the output terminal of the power device;an amplifier coupled
1. A power device temperature monitor, comprising: a power device having a control terminal and an output terminal, the output terminal configured to output a current as directed by a voltage of the control terminal;an inductor coupled to the output terminal of the power device;an amplifier coupled to the inductor; anda computing device that receives an output of the amplifier, the computing device configured to derive a temperature of the power device based upon the output of the amplifier wherein the derivation of the temperature involves a comparison of a value associated with a voltage drop across the inductor with characterization data accessed by the computing device. 2. The power device temperature monitor of claim 1, wherein the power device comprises one or more integrated gate bipolar transistors or field effect transistors. 3. The power device temperature monitor of claim 1, wherein the inductor comprises one or more parasitic inductors. 4. The power device temperature monitor of claim 1, wherein the amplifier comprises an isolation differential amplifier. 5. The power device temperature monitor of claim 1, wherein the computing device comprises: an analog-to-digital converter coupled to the amplifier;data relating at least one operating parameter of the power device to temperature; anda processor coupled to the analog-to-digital converter, the processor having access to the data. 6. The power device temperature monitor of claim 1, wherein the computing device receives the voltage of the control terminal of the power device, and wherein the derived temperature of the power device is further based upon the voltage of the control terminal of the power device. 7. A temperature monitor for power transistors, comprising: a plurality of power transistors arranged in parallel, the plurality of power transistors having a control voltage;a plurality of inductors arranged in series, each inductor of the plurality of inductors coupling outputs of neighboring power transistors such that an output current of the plurality of power transistors is routed through the plurality of inductors;an amplifier coupled to at least one of the plurality of inductors;an analog-to-digital converter coupled to an output of the amplifier; anda processor in communication with the analog-to-digital converter, the processor configured to execute instructions for computing temperature information relating to the power transistors based upon an analog-to-digital conversion of the output of the amplifier. 8. The temperature monitor for power transistors of claim 7, comprising: a bus bar coupled to the outputs of the plurality of power transistors, the bus bar including the plurality of inductors and wherein the amplifier is a differential amplifier. 9. The temperature monitor for power transistors of claim 7, wherein the analog-to-digital converter is coupled to the control voltage and wherein the temperature information is further based upon an analog-to-digital conversion of the control voltage. 10. The temperature monitor for power transistors of claim 7, wherein the processor has access to data that includes a turn on delay, or a turn off delay, of a power transistor at two or more temperatures. 11. The temperature monitor for power transistors of claim 7, wherein the processor has access to data that includes a turn on switching duration, or a turn off switching duration, of a power transistor at two or more temperatures. 12. The temperature monitor for power transistors of claim 7, wherein the temperature information relating to the power transistors includes one from a set consisting of: an estimated temperature, a temperature trend, and a warning regarding a temperature. 13. The temperature monitor for power transistors of claim 7, further comprising: a current sensor arranged so that the output current of at least one of the plurality of power transistors is routed through the current sensor, the current sensor in communication with the processor, wherein the temperature information is further based upon a measurement from the current sensor. 14. The temperature monitor for power transistors of claim 7, further comprising: a further amplifier coupled to a differing at least one of the plurality of inductors, wherein an output of the further amplifier is coupled to the analog-to-digital converter. 15. A method for monitoring temperature of a power transistor, the method comprising: measuring a voltage across an inductor coupled to an output of the power transistor, versus time;deriving a delay time of the power transistor or a switching time of the power transistor, from the measured voltage across the inductor versus time; andderiving an estimate of an operating temperature of the power transistor based upon the derived delay time or the derived switching time, wherein at least one method operation is executed through a processor and wherein the deriving of the estimate involves a comparison of a value associated with the measured voltage across the inductor with characterization data accessed by the processor. 16. The method of claim 15, wherein the power transistor includes an integrated gate bipolar transistor or a field effect transistor. 17. The method of claim 15, wherein deriving the switching time of the power transistor includes integrating the measured voltage across the inductor versus time. 18. The method of claim 15, further comprising: measuring a voltage of a control of the power transistor versus time, wherein deriving the delay time of the power transistor includes comparing the voltage across the inductor versus time to the voltage of the control of the power transistor versus time. 19. The method of claim 15, further comprising: storing data prior to measuring the voltage across the inductor, the data relating operating temperature of a power transistor to delay times of the power transistor or to switching times of the power transistor, wherein the deriving the estimate of the operating temperature of the power transistor is further based upon the data stored prior to measuring the voltage across the inductor, wherein the derived delay time includes a turn on delay time, a turn off delay time, or a combined turn on and turn off delay time, and wherein the derived switching time includes a turn on switching time, a turn off switching time, or a combined turn on and turn off delay time.
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