The present interposer makes it possible to tailor the coefficient of thermal expansion of the interposer to match components to be attached thereto within very wide ranges. The semiconductor interposer, includes a substrate of a semiconductor material having a first side and an opposite second side
The present interposer makes it possible to tailor the coefficient of thermal expansion of the interposer to match components to be attached thereto within very wide ranges. The semiconductor interposer, includes a substrate of a semiconductor material having a first side and an opposite second side. There is at least one conductive wafer-through via including metal. At least one recess is provided in the first side of the substrate and in the semiconductor material of the substrate, the recess being filled with metal and connected with the wafer-through via providing a routing structure. The exposed surfaces of the metal-filled via and metal-filled recess are essentially flush with the substrate surface on the first side of the substrate. The wafer-through via includes a narrow part and a wider part, and contact elements are provided on the routing structure having an aspect ratio, height:diameter, 1:1, preferably 1:1 to 2:1.
대표청구항▼
1. Semiconductor interposer, comprising: a substrate of a semiconductor material having a first side and an opposite second side;at least one conductive wafer-through via comprising metal;at least one recess provided in the first side of the substrate and in the semiconductor material of the substra
1. Semiconductor interposer, comprising: a substrate of a semiconductor material having a first side and an opposite second side;at least one conductive wafer-through via comprising metal;at least one recess provided in the first side of the substrate and in the semiconductor material of the substrate, the recess being filled with metal and connected with the wafer-through via providing a routing structure; whereinthe exposed surfaces of the metal filled via and the metal filled recess are essentially flush with the substrate surface on the first side of the substrate; whereinthe wafer-through via comprises a narrow part and a wider part;there are provided contact elements on said routing structure having an aspect ratio, height:diameter, <1:1, preferably 1:1 to 2:1; and whereinthere is a plurality of vias and recesses forming electrical connections between said first and second structures attached to the first and second sides of the interposer, respectively, and a plurality of vias and recesses which are provided for the purpose of adapting the overall coefficient of thermal expansion of the interposer to said value between the values of the first and the second structure, respectively. 2. The interposer according to claim 1, wherein the overall coefficient of thermal expansion of the interposer as a whole has a value in between i) the value of the coefficient of thermal expansion of a first structure having a low coefficient of thermal expansion and which is to be attached to the first side of the interposer, and ii) the value of coefficient of thermal expansion of a second structure having a high coefficient of thermal expansion and which is to be attached to the second side of the interposer. 3. The interposer according to claim 1, wherein the said contact elements are pillars, preferably copper based solder pillars. 4. The interposer according to claim 1, wherein the height of the contact elements is 30-100 μm and the diameter is 20-50 μm. 5. The interposer according to claim 1, further comprising thermal expansion matching structure entirely or partly filled with metal. 6. The interposer according to claim 5, wherein the interposer comprises thermal expansion matching structure having only a wide part extending only over a fraction of the thickness of the substrate. 7. The interposer according to claim 5, wherein a thermal expansion matching structure comprises only a narrow part, filled with metal, and extending only over a fraction of the thickness of the substrate. 8. The interposer according to claim 5, wherein a thermal expansion matching structure comprises both a wide and a narrow part, wherein the narrow part is completely filled with metal and the wide part is at least provided with a liner layer of metal. 9. The interposer according to claim 1, wherein a via is only partly filled with metal and further comprises a further material selected from polymer, and poly-silicon. 10. The interposer according to claim 9, wherein the polymer is selected from siloxane based photosensitive permanent resist and off stoichmetric thiol-enes. 11. The interposer according to claim 9, wherein there are provided solder balls (BGA) on the back side of the interposer, slightly displaced from the center of a via such they cover the material in the liner layer only to one side. 12. The interposer according to claim 9, wherein a collar (C) around the via is provided on the back side, said collar being flush with the surrounding substrate (10) surface, and wherein the solder ball BGA is attached partly to this collar (C) and partly supported by the further material P in the via. 13. The interposer according to claim 9, wherein a collar around the via is provided on the back side, said collar being raised above the surrounding substrate surface. 14. Semiconductor product comprising: an interposer according to claim 1;a first structure having a low coefficient of thermal expansion and which is attached to the first side of the interposer; anda second structure having a high coefficient of thermal expansion and which is attached to the second side of the interposer. 15. The product according to claim 14, wherein said first structure is a silicon based integrated circuit; and wherein said second structure is a circuit board. 16. The product according to claim 14, wherein there is provided underfill between the interposer and the silicon device on the top. 17. A method of making an interposer, comprising providing a substrate having a front side and a back side; making a double via having a narrow part and a wide part; depositing metal at least as a liner layer inside the via on its walls; providing redistribution structures in the surface(s) of the substrate which are flush with at least the front side of the substrate; making contact elements on the redistribution structures on the front side, said contact elements having an aspect ratio, height:diameter <1:1, preferably 1:1 to 2:1. 18. The method according to claim 17, wherein an elastic polymer or poly-silicon is deposited in the voids in the via.
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이 특허에 인용된 특허 (3)
Conn, Robert O.; Carey, Steven J., Flip-chip package having thermal expansion posts.
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