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Memory objects may be allocated and re-allocated within a computer system to consolidate infrequently used memory objects to memory regions that may be operated at lower power. During initial allocation of memory objects, the objects may be placed into high power regions. During subsequent periodic

Memory objects may be allocated and re-allocated within a computer system to consolidate infrequently used memory objects to memory regions that may be operated at lower power. During initial allocation of memory objects, the objects may be placed into high power regions. During subsequent periodic analysis, memory objects in high power regions that are infrequently used may be relocated to lower power regions while memory objects in low power regions that are frequently used may be moved to the high power regions. Various heuristics or logic may be used to handle unmovable objects, shared objects, and other types of objects.

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1. A method performed by a computer processor, said method comprising: monitoring a plurality of memory objects in a plurality of memory regions;wherein the plurality of memory regions are of a same memory device of a plurality of memory devices of a memory array;classifying at least some of said me

1. A method performed by a computer processor, said method comprising: monitoring a plurality of memory objects in a plurality of memory regions;wherein the plurality of memory regions are of a same memory device of a plurality of memory devices of a memory array;classifying at least some of said memory objects based on frequency of use;classifying at least some of said memory regions based on access frequency;operating each of said memory regions in one of at least two different power levels, one of said different power levels being a high power level and a different one of said different power levels being a low power level, and grouping said memory regions by said different power levels into a first grouping;allocating memory to a first memory object by: identifying a first memory region being within said high power level group; andplacing said memory object in said first memory region;after allocating memory to the first memory object, selecting second memory objects of a second memory region for a queue;selecting second memory objects of the second memory region for relocation, wherein said selection for relocation is of the second memory objects selected for the queue;relocating a second memory object of the second memory objects selected for relocation to a memory region having a classification that corresponds to a value of a classification of said second memory object;ascertaining whether said second memory object is a last memory object of the second memory objects selected for relocation;repeating the relocating and ascertaining with respect to a next second memory object of the second memory objects selected for relocation until the last memory object of the second memory objects selected for relocation is relocated;in response to relocating the last memory object of the second memory objects selected for relocation, determining whether to re-assign a power level classification of the second memory region; andobtaining a second grouping that is different than the first grouping responsive to determining to re-assign the power level classification of the second memory region. 2. The method of claim 1 further comprising: transferring a third memory object from said first memory region to a third memory region, said third memory region belonging to a lower power level group than the first memory region. 3. The method of claim 2 further comprising: identifying said third memory object having a frequency of use that is lower than at least one other memory object within said first memory region. 4. The method of claim 3, said third memory object having the lowest frequency of use of memory objects in said first memory region. 5. The method of claim 1 further comprising: identifying each of said memory regions with a desired power level;analyzing at least some of said memory objects within each of said memory regions to determine an actual usage level; andcomparing said actual usage level to said desired power level to identify a third memory region having a high actual usage level when compared to said desired power level. 6. The method of claim 5 further comprising: identifying a third memory object within said third memory region having a high frequency of use and moving said third memory object from said third memory region to a memory region within said high power level group of memory regions. 7. The method of claim 5 further comprising: detecting that a workload executing on said computer processor has changed and changing said desired power level for at least one of said memory regions based on said detecting. 8. The method of claim 1 further comprising: ranking each of said memory regions within said different power levels, said ranking being based on usage of at least some of said memory objects within each of said memory regions. 9. The method of claim 8 further comprising: ranking at least some of said memory objects within each of said memory regions based on usage of said at least one of said memory objects. 10. The method of claim 1 further comprising: determining that said first memory object is an unmovable object prior to said allocating. 11. The method of claim 1 further comprising: allocating memory to a third memory object by: determining that said third memory object is a low use memory object;identifying a third memory region being within said low power level group;placing said third memory object in said third memory region. 12. The method of claim 1 further comprising: allocating memory to a third memory object by: determining that said first memory object is an unmovable object;identifying a third memory region having at least one other unmovable object; andplacing said third memory object in said third memory region. 13. The method of claim 1, wherein each of said memory regions have a separate power control. 14. A memory having instructions stored thereon that, in response to execution by a processing device, cause the processing device to perform operations comprising: retaining first information about a memory region that includes a plurality of memory objects of a memory array;wherein the first information includes at least one of an assigned power level of the memory region or a memory region access classification of the memory region;controlling power settings of the memory array at a granularity finer than rank level based on the retained first information;selecting memory objects of the plurality of memory objects of the memory region for a queue;selecting memory objects of the plurality of memory objects of the memory region for relocation, wherein said selection for relocation is of the memory objects selected for the queue;relocating a memory object of the memory objects selected for relocation to a memory region having a classification that corresponds to a value of a classification of said memory object;ascertaining whether said memory object is a last memory object of the memory objects selected for relocation;repeating the relocating and ascertaining with respect to a next memory object of the memory objects selected for relocation until the last memory object of the memory objects selected for relocation is relocated;in response to relocating the last memory object of the second memory objects selected for relocation, determining whether to retain second information about the memory region that is different than the first information about the memory region; andin response to determining to retain the second information about the memory region, controlling power settings of the memory array at a granularity finer than rank level based on the retained second information. 15. The memory of claim 14, wherein the operations further comprise: monitoring activity associated with of each of the memory objects; andselecting the memory objects of the plurality of memory objects of the memory region for the queue based on a result of the monitoring. 16. The memory of claim 15, wherein each of the memory region and a memory region associated with the relocation corresponds to a same memory device of the plurality of memory devices of the memory array. 17. The memory of claim 14, wherein the second information includes a re-assigned power level. 18. The memory of claim 14, wherein the selected memory objects of the plurality of memory objects for the queue comprises a subset of the plurality of memory objects. 19. The memory of claim 18, wherein the operations further comprise ranking the memory objects of the subset based on respective classifications of the memory objects of the subset. 20. The memory of claim 19, wherein the operations further comprise: determining whether a memory object of the subset of memory objects comprises at least one of a private memory object or a shared memory object; responsive to determining that said memory object of the subset of memory objects comprises a private memory object, generating a first sorting of the memory objects of the subset; responsive to determining that said memory object of the subset of memory objects does not comprise the private memory object, generating a second sorting of the memory objects of the subset that is different than the first sorting. 21. The memory of claim 18, wherein the operations further comprise: determining whether a memory object of the plurality of memory objects is classified as private; and identifying the subset responsive to the determination of whether said memory object of the plurality of memory objects is classified as private.