Semiconductor light emitting device and light emitting apparatus
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/00
H01L-033/00
H01L-027/15
H01L-033/62
H01L-033/20
H01L-033/38
H01L-033/44
출원번호
US-0817750
(2015-08-04)
등록번호
US-9324904
(2016-04-26)
우선권정보
KR-10-2012-0089024 (2012-08-14)
발명자
/ 주소
Yang, Jong In
Kim, Yong Il
Song, Kwang Min
Lim, Wan Tae
Han, Se Jun
Hong, Hyun Kwon
출원인 / 주소
SAMSUNG ELECTRONICS CO., LTD.
대리인 / 주소
F. Chau & Associates, LLC
인용정보
피인용 횟수 :
0인용 특허 :
41
초록▼
A semiconductor light emitting device includes a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer, a first internal electrode, a second internal electrode, an insulating part, and first and second pad electrodes. The active layer is disposed on a first p
A semiconductor light emitting device includes a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer, a first internal electrode, a second internal electrode, an insulating part, and first and second pad electrodes. The active layer is disposed on a first portion of the first conductive semiconductor layer, and has the second conductive layer disposed thereon. The first internal electrode is disposed on a second portion of the first conductive semiconductor layer separate from the first portion. The second internal electrode is disposed on the second conductive semiconductor layer. The insulating part is disposed between the first and second internal electrodes, and the first and second pad electrodes are disposed on the insulating part to connect to a respective one of the first and second internal electrodes.
대표청구항▼
1. A method of manufacturing a semiconductor light emitting device, comprising: forming a groove in a first conductive semiconductor layer, an active layer formed on the first conductive semiconductor layer, and a second conductive semiconductor layer formed on the active layer, by removing at least
1. A method of manufacturing a semiconductor light emitting device, comprising: forming a groove in a first conductive semiconductor layer, an active layer formed on the first conductive semiconductor layer, and a second conductive semiconductor layer formed on the active layer, by removing at least one portion of the second conductive semiconductor layer and the active layer so as to expose a first portion of the first conductive semiconductor layer;forming a first internal electrode connected to the first portion of the first conductive semi-conductor layer by filling a portion of the groove with an electrode material;forming a second internal electrode connected to the second conductive semiconductor layer on at least one portion of the second conductive semiconductor layer;forming an insulating part by filling a remainder portion of the groove with an insulating material, wherein the insulating part is formed on one portion of the first portion, the first and second internal electrodes respectively and formed to have an open region exposing at least one portion of each of the first and second internal electrodes; andforming first and second pad electrodes on the insulating part and each connected to a respective one of the first and second internal electrodes exposed through the open region,wherein the first internal electrode includes first electrode regions separate from each other and second electrode regions connecting the first electrode regions, each of the first electrode regions having a width that is larger than a width of each of the second electrode regions, andwherein the second internal electrode is formed enclosing the first electrode regions and the second electrode regions. 2. The method of claim 1, wherein the first internal electrode is formed to have a shape corresponding to a shape of the groove. 3. The method of claim 1, wherein the groove includes a plurality of first groove regions separate from each other and a plurality of second groove regions connecting the plurality of first groove regions, and each of the first groove regions has a width that is larger than a width of each of the second groove regions. 4. The method of claim 3, wherein the groove includes a third groove region connecting first groove regions that are arranged in different rows among the plurality of rows. 5. The method of claim 4, wherein the first internal electrode is formed to fill a portion of the third groove region. 6. The method of claim 3, wherein the first internal electrode is formed to fill a portion of the first groove regions and a portion of the second groove regions. 7. The method of claim 3, wherein the first internal electrode is formed to fill a portion of the first groove regions and is not formed in the second groove regions. 8. The method of claim 3, wherein the first internal electrode first electrode regions are contact regions and each contact region fills a portion of a corresponding first groove region, and the insulating part is formed to expose at least one portion of each of the contact regions and to cover the second groove regions such that the second groove regions are not exposed. 9. The method of claim 1, wherein the groove is formed to have a shape in which a plurality of stripes are arranged in parallel to each other, when viewed from above the second conductive semiconductor layer, and the plurality of stripes are connected to each other through another region of the groove formed in a direction perpendicular to the plurality of stripes. 10. The method of claim 9, wherein the. insulating part does not cover an upper surface of the first internal electrode.
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