Log-likelihood ratio (LLR) dampening in low-density parity-check (LDPC) decoders
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H03M-013/00
H03M-013/11
H03M-013/37
G06F-011/10
출원번호
US-0934999
(2013-07-03)
등록번호
US-9337865
(2016-05-10)
발명자
/ 주소
Cohen, Earl T.
Haratsch, Erich F.
Alhussien, Abdel-Hakim S.
출원인 / 주소
Seagate Technology LLC
대리인 / 주소
IP Legal Services, LLC
인용정보
피인용 횟수 :
2인용 특허 :
19
초록▼
Described embodiments provide a media controller to read data stored in a media. The media controller determines a value for each bit of a shortened codeword from the media. The shortened codeword includes a plurality of non-shortened bits of a full codeword, where the full codeword includes the plu
Described embodiments provide a media controller to read data stored in a media. The media controller determines a value for each bit of a shortened codeword from the media. The shortened codeword includes a plurality of non-shortened bits of a full codeword, where the full codeword includes the plurality of non-shortened bits and one or more shortened bits. Shortened bits correspond to bits unused in the shortened codeword. The media controller converts the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values. The full codeword is decoded using the first set of LLR values for the shortened codeword. The media controller dampens one or more LLR values corresponding to non-shortened bits of the codeword to produce a second set of LLR values and decodes the second set of LLR values.
대표청구항▼
1. A method of reading, by a controller, data from at least one of a storage media and a communication channel, the method comprising: determining a value for each bit of a shortened codeword of the read data, wherein the shortened codeword comprises a plurality of non-shortened bits of a full codew
1. A method of reading, by a controller, data from at least one of a storage media and a communication channel, the method comprising: determining a value for each bit of a shortened codeword of the read data, wherein the shortened codeword comprises a plurality of non-shortened bits of a full codeword, the full codeword comprising the plurality of non-shortened bits and one or more shortened bits, the shortened bits corresponding to bits unused in the shortened codeword;converting the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values;decoding the full codeword using the first set of LLR values for the shortened codeword;dampening one or more LLR values of the first set of LLR values, the one or more LLR values corresponding to non-shortened bits of the codeword to produce a second set of LLR values, wherein the dampening comprises: setting one or more LLR values corresponding to shortened bits of the shortened codeword to an associated maximum LLR magnitude; anddecoding the second set of LLR values,wherein the step of dampening one or more LLR values is performed only if the decoding of the first set of LLR values did not successfully recover data corresponding to the shortened codeword. 2. The method of claim 1, wherein the step of dampening one or more LLR values comprises: decreasing a magnitude of one or more of the LLR values of the first set of LLR values by a predetermined amount. 3. The method of claim 2, wherein the one or more LLR values decreased in magnitude have a maximum LLR magnitude. 4. The method of claim 1, wherein the step of dampening one or more LLR values comprises: scaling a magnitude of one or more of the LLR values of the first set of LLR values by a predetermined scaling factor. 5. The method of claim 1, wherein the step of dampening one or more LLR values dampens LLR values such that all non-shortened positions of the codeword have less than a maximum magnitude LLR value. 6. The method of claim 1, wherein the step of decoding is low-density parity check (LDPC) decoding. 7. The method of claim 1, further comprising: dampening one or more LLR values of the first set of LLR values before decoding the first set of LLR values for the shortened codeword. 8. The method of claim 1, further comprising: if the decoding did not successfully recover data corresponding to the shortened codeword from the second set of LLR values: dampening one or more LLR values of the second set of LLR values, the one or more LLR values corresponding to non-shortened bits of the codeword to produce a third set of LLR values; anddecoding the third set of LLR values. 9. The method of claim 8, wherein: the dampening of the first set of LLR values is performed by decreasing a magnitude of one or more of the LLR values of the first set of LLR values by a first predetermined amount; andthe dampening of the second set of LLR values is performed by decreasing the magnitude of one or more of the LLR values of the second set of LLR values by a second predetermined amount. 10. The method of claim 8, wherein: the dampening of the first set of LLR values is performed by scaling a magnitude of one or more of the LLR values of the first set of LLR values by a first scaling factor; andthe dampening of the second set of LLR values is performed by scaling the magnitude of one or more of the LLR values of the second set of LLR values by a second scaling factor. 11. The method of claim 1, wherein the determined values are at least one of binary data or an analog voltage level. 12. The method of claim 11, wherein the step of converting the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values is performed employing a first threshold level. 13. The method of claim 12, further comprising: if a threshold number of dampening operations is reached: determining whether a read retry limit of the controller is reached;if the read retry limit is not reached: re-reading values for each bit of the shortened codeword from the storage media;converting, employing one or more subsequent threshold levels, the determined values for each bit of the shortened codeword into a subsequent set of log-likelihood ratio (LLR) values;re-performing the steps of dampening and decoding employing the subsequent set of LLR values. 14. The method of claim 13, further comprising: if the read retry limit is reached: performing further data recovery on the set of LLR values. 15. The method of claim 14, wherein the further data recovery is at least one of: digital signal processing (DSP) and redundant array of independent disks (RAID) data recovery. 16. A non-transitory machine-readable storage medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements a method of reading, by a controller, data from at least one of a storage media and a communication channel, the method comprising: determining a value for each bit of a shortened codeword of the read data, wherein the shortened codeword comprises a plurality of non-shortened bits of a full codeword, the full codeword comprising the plurality of non-shortened bits and one or more shortened bits, the shortened bits corresponding to bits unused in the shortened codeword;converting the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values;decoding the full codeword using the first set of LLR values for the shortened codeword;dampening one or more LLR values of the first set of LLR values, the one or more LLR values corresponding to non-shortened bits of the codeword to produce a second set of LLR values, wherein the dampening comprises: setting one or more LLR values corresponding to shortened bits of the shortened codeword to an associated maximum LLR magnitude; anddecoding the second set of LLR values,wherein the step of dampening one or more LLR values is performed only if the decoding of the first set of LLR values did not successfully recover data corresponding to the shortened codeword. 17. A controller coupled to a host device and at least one of a storage media and a communication channel, the controller comprising: a buffer configured to store data read from the at least one of a storage media and a communication channel;a low density parity check decoder configured to: determine a value for each bit of a shortened codeword of the read data, wherein the shortened codeword comprises a plurality of non-shortened bits of a full codeword, the full codeword comprising the plurality of non-shortened bits and one or more shortened bits, the shortened bits corresponding to bits unused in the shortened codeword;convert the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values;decode the full codeword using the first set of LLR values for the shortened codeword;dampen one or more LLR values of the first set of LLR values, the one or more LLR values corresponding to non-shortened bits of the codeword to produce a second set of LLR values, wherein the decoder is configured to dampen by: setting one or more LLR values corresponding to shortened bits of the shortened codeword to an associated maximum LLR magnitude; anddecode the second set of LLR values,wherein the step of dampening one or more LLR values is performed only if the decoding of the first set of LLR values did not successfully recover data corresponding to the shortened codeword. 18. The controller of claim 17, wherein: the controller is configured to dampen the one or more LLR values only if the decoding of the first set of LLR values did not successfully recover data corresponding to the shortened codeword, wherein the one or more LLR values are dampened by setting one or more LLR values corresponding to shortened bits of the shortened codeword to an associated maximum LLR magnitude;the storage media comprises at least one of: a solid-state disk (SSD), a hard disk drive (HDD), an optical storage system, and a hybrid solid-state and magnetic storage system;the communication channel comprises at least one of: a backplane, a drive head in a magnetic recording system, one or more optical fibers, one or more coaxial cables, one or more twisted pair copper wires, and one or more radio frequency (RF) channels; andthe controller is implemented as a system-on-chip (SoC).
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이 특허에 인용된 특허 (19)
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Blanksby, Andrew J.; Shen, Ba-Zhong; Trachewsky, Jason A., Low complexity communication device employing in-place constructed LDPC (low density parity check) code.
Bickerstaff, Mark Andrew; Pope, Graeme Edwin; Widdup, Benjamin John; Woodward, Graeme Kenneth, Method and apparatus for block and rate independent decoding of LDPC codes.
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