최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | US-0601595 (2015-01-21) |
등록번호 | US-9362743 (2016-06-07) |
발명자 / 주소 |
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출원인 / 주소 |
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대리인 / 주소 |
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인용정보 | 피인용 횟수 : 0 인용 특허 : 502 |
A circuit for combining direct current (DC) power including multiple direct current (DC) voltage inputs; multiple inductive elements. The inductive elements are adapted for operatively connecting respectively to the DC voltage inputs. Multiple switches connect respectively with the inductive element
A circuit for combining direct current (DC) power including multiple direct current (DC) voltage inputs; multiple inductive elements. The inductive elements are adapted for operatively connecting respectively to the DC voltage inputs. Multiple switches connect respectively with the inductive elements. A controller is configured to switch the switches periodically at a frequency sufficiently high so that direct currents flowing through the inductive elements are substantially zero. A direct current voltage output is connected across one of the DC voltage inputs and a common reference to both the inputs and the output.
1. A method, comprising: connecting at least two input direct current (DC) voltages to at least two primary inductors via at least two primary switches and to at least two secondary inductors via at least two secondary switches of a circuit, wherein the at least two primary inductors are coupled to
1. A method, comprising: connecting at least two input direct current (DC) voltages to at least two primary inductors via at least two primary switches and to at least two secondary inductors via at least two secondary switches of a circuit, wherein the at least two primary inductors are coupled to the at least two secondary inductors, wherein a first DC voltage is connected to a first primary inductor via a first primary switch and to a first secondary inductor via a first secondary switch, and a second DC voltage is connected to a second primary inductor via a second primary switch and to a second secondary inductor via a second secondary switch, wherein at least one input terminal is shared between the at least two input DC voltages;switching the at least two primary switches and the at least two secondary switches at different times; andoutputting a combined voltage at an output of the circuit, the combined voltage being a sum of the at least two input DC voltages. 2. The method of claim 1, wherein switching the at least two primary switches and the at least two secondary switches at different times comprises: simultaneously switching on the at least two primary switches and switching off the at least two secondary switches. 3. The method of claim 2, wherein switching the at least two primary switches and the at least two secondary switches at different times comprises: simultaneously switching off the at least two primary switches and switching on the at least two secondary switches. 4. The method of claim 3, wherein the at least two primary switches and the at least two secondary switches are switched on once during a duty cycle. 5. The method of claim 4, wherein the at least two primary switches and the at least two secondary switches are switched on for an equal amount of time during the duty cycle. 6. The method of claim 1, wherein connecting the at least two input direct current (DC) voltages to the at least two primary inductors via the at least two primary switches and to the at least two secondary inductors via the at least two secondary switches of the circuit comprises: connecting at least three input DC voltages to at least three primary inductors via at least three primary switches and to at least three secondary inductors via at least three secondary switches of the circuit. 7. A circuit, comprising: a first terminal;a second terminal, wherein an output voltage of the circuit is a voltage across the first terminal and the second terminal;a first winding connected between the first terminal and the second terminal, wherein the first winding comprises a first primary inductor, a last primary inductor, and at least one intermediate primary inductor connected between the first primary inductor and the last primary inductor, wherein a first end of the first primary inductor is connected to the first terminal and a second end of the last primary inductor is connected via a switch to the second terminal; anda second winding connected between the first terminal and the second terminal, the second winding comprising a plurality of secondary inductors, wherein each secondary inductor is paired with a primary inductor and each pair of a primary inductor and secondary inductor shares at least one input terminal. 8. The circuit of claim 7, wherein each pair of a primary inductor and secondary inductor shares two input terminals. 9. The circuit of claim 7, wherein each pair of a primary inductor and secondary inductor has a same input voltage. 10. The circuit of claim 7, further comprising a diode connected between each input terminal. 11. The circuit of claim 7, wherein each intermediate primary inductor is connected at a first end to a first shared input terminal shared with another primary inductor and at a second end to a second shared input terminal shared with another primary inductor. 12. The circuit of claim 7, further comprising: a plurality of photovoltaic cells connected to the first winding and to the second winding. 13. The circuit of claim 7, wherein the switch is a metal oxide semiconductor field-effect transistor (MOSFET), silicon controlled rectifier (SCR), insulated gate bipolar junction transistor (IGBT), bipolar junction transistor (BJT), field effect transistor (FET), junction field effect transistor (JFET), switching diode, mechanically operated single pole double pole switch (SPDT), SPDT electrical relay, SPDT reed relay, SPDT solid state relay, or insulated gate field effect transistor (IGFET). 14. A circuit, comprising: a first terminal;a second terminal, wherein an output voltage of the circuit is a voltage across the first terminal and the second terminal;shared input direct current (DC) voltage terminals;a plurality of primary inductors each having a respective first end and a respective second end, the plurality of primary inductors comprising a first primary inductor, a last primary inductor, and at least one intermediate primary inductor, wherein the first primary inductor is connected at the respective first end to the first terminal and at the respective second end to the at least one intermediate primary inductor, wherein the at least one intermediate primary inductor is connected at each respective end to another primary inductor, wherein the last primary inductor is connected at the respective first end to the at least one intermediate primary inductor;a plurality of primary switches comprising intermediate primary switches and a last primary switch, wherein the first primary inductor and the at least one intermediate primary inductor are connected at the respective second ends to a respective first end of each of the intermediate primary switches, wherein the last primary inductor is connected at the respective second end to the second terminal via the last primary switch;a plurality of secondary inductors each having a respective first end and a respective second end, the plurality of secondary inductors comprising a first secondary inductor, a last secondary inductor, and at least one intermediate secondary inductor, wherein the first secondary inductor is connected at the respective first end to a first terminal and at the respective second end to the at least one intermediate secondary inductor, wherein the at least one intermediate secondary inductor is connected at each respective end to another secondary inductor, wherein the last secondary inductor is connected at the respective first end to the at least one intermediate secondary inductor; anda plurality of secondary switches comprising intermediate secondary switches and a last secondary switch, wherein the first secondary inductor and the at least one intermediate secondary inductor are connected at the respective second ends to a respective first end of each of the intermediate secondary switches, wherein the last secondary inductor is connected at the respective second end to the second terminal via the last secondary switch, wherein respective second ends of the plurality of primary switches and of the plurality of secondary switches are connected to the shared input direct current (DC) voltage terminals. 15. The circuit of claim 14, wherein a first primary switch is connected at a first end to the first primary inductor and to the at least one intermediate primary inductor and at a second end to an intermediate input terminal. 16. The circuit of claim 14, wherein a first secondary switch is connected at a first end to the first secondary inductor and to the at least one intermediate primary inductor and at a second end to an intermediate input terminal. 17. The circuit of claim 14, wherein each shared input DC voltage terminal is connected to one primary switch and to one secondary switch. 18. The circuit of claim 14, further comprising: a transformer core between the plurality of primary inductors and the plurality of secondary inductors to electromagnetically couple the plurality of primary inductors and the plurality of secondary inductors. 19. The circuit of claim 14, further comprising: a plurality of photovoltaic cells connected to the plurality of primary inductors and to the plurality of secondary inductors. 20. The circuit of claim 14, wherein the plurality of primary switches and the plurality of secondary switches are metal oxide semiconductor field-effect transistors (MOSFET), silicon controlled rectifiers (SCR), insulated gate bipolar junction transistors (IGBT), bipolar junction transistors (BJT), field effect transistors (FET), junction field effect transistors (JFET), switching diodes, mechanically operated single pole double pole switches (SPDT), SPDT electrical relays, SPDT reed relays, SPDT solid state relays, or insulated gate field effect transistors (IGFET).
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