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Apparatus and method for efficient scheduling of tasks 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
  • G06F-015/16
  • G06F-001/32
  • G06F-013/40
  • H04L-029/06
  • H04L-029/08
  • G06F-001/20
  • G06F-009/50
  • G06F-009/48
출원번호 US-0663602 (2015-03-20)
등록번호 US-9377837 (2016-06-28)
발명자 / 주소
  • Ghose, Kanad
출원인 / 주소
  • The Research Foundation for The State University of New York
대리인 / 주소
    Hoffberg, Esq., Steven M.
인용정보 피인용 횟수 : 3  인용 특허 : 69

초록

A system and method of scheduling tasks, comprising receiving activity and performance data from registers or storage locations maintained by hardware and an operating system; storing calibration coefficients associated with the activity and performance data; computing an energy dissipation rate bas

대표청구항

1. A method for controlling a data center comprising a plurality of servers, each server having an activated state available to receive processing tasks, a non-activated state incapable of receiving processing tasks, an energy consumption when in a non-activated state, and a higher energy consumptio

이 특허에 인용된 특허 (69)

  1. Hass, David T., Advanced processor with mechanism for packet distribution at high line rate.
  2. Hass, David T., Advanced processor with mechanism for packet distribution at high line rate.
  3. Ghose, Kanad, Apparatus and method for efficient estimation of the energy dissipation of processor based systems.
  4. Gonzalez, Jose; Gonzalez, Antonio, Apparatus for an energy efficient clustered micro-architecture.
  5. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Apparatus for compact internetworked wireless integrated network sensors (WINS).
  6. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Apparatus for internetworked hybrid wireless integrated network sensors (WINS).
  7. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Apparatus for internetworked wireless integrated network sensors (WINS).
  8. Vandeweerd,Ivo, Array of parallel programmable processing engines and deterministic method of operating the same.
  9. Fedorova, Alexandra; Vengerov, David; Pusukuri, Kishore Kumar, Cache-aware thread scheduling in multi-threaded systems.
  10. Tang Jun ; So John Ling Wing, Computer operating process allocating tasks between first and second processors at run time based upon current processor load.
  11. Tameshige,Takashi; Takamoto,Yoshifumi, Computer resource distribution method based on prediction.
  12. Yakes, Christopher K.; Morrow, Jon J.; Pillar, Duane R.; Squires, Bradley C., Control system and method for electric vehicle.
  13. So John Ling Wing ; Kerr Jeffrey L. ; Magee Steven R. ; Tang Jun, Devices, methods, systems and software products for coordination of computer main microprocessor and second microprocessor coupled thereto.
  14. Ghose, Kanad, Energy aware processing load distribution system and method.
  15. Bell, Jr., Robert H.; Brochard, Luigi; DeSota, Donald R.; Panda, Rajendra D.; Thomas, Francois, Energy-aware job scheduling for cluster environments.
  16. Squires,Bradley C.; Pillar,Duane R., Equipment service vehicle with remote monitoring.
  17. Ishihara, Toru; Fallah, Farzan, Estimating software power consumption.
  18. Johnson, Darrin Paul; Saxe, Eric Christopher; Smaalders, Bart, Frequency scaling of processing unit based on aggregate thread CPI metric.
  19. Hoffberg, Steven M., Game theoretic prioritization scheme for mobile ad hoc networks permitting hierarchal deference.
  20. Johnson, Darrin Paul; Saxe, Eric Christopher; Smaalders, Bart, Hardware utilization-aware thread management in multithreaded computer systems.
  21. Titiano, Patrick C; Qasem, Safwan, Hardware voting mechanism for arbitrating scaling of shared voltage domain, integrated circuits, processes and systems.
  22. Dave Bharat P. ; Jha Niraj K., Hardware-software co-synthesis of heterogeneous distributed embedded systems for low overhead fault tolerance.
  23. Dave Bharat P. ; Jha Niraj K., Hardware-software co-synthesis of hierarchical heterogeneous distributed embedded systems.
  24. Nollet, Vincent; Coene, Paul; Marescaux, Theodore; Avasare, Prabhat; Mignolet, Jean-Yves; Vernalde, Serge; Verkest, Diederik, Heterogeneous multiprocessor network on chip devices, methods and operating systems for control thereof.
  25. Ranganathan, Parthasarathy; Farkas, Keith; Moore, Justin, Historical data based workload allocation.
  26. Greene, Daniel H.; Preas, Bryan T.; Chu, Maurice K.; Hindi, Haitham; Parekh, Nitin S.; Reich, James E., Integrated energy savings and business operations in data centers.
  27. Lightstone, Michael L.; Eckart, Stefan; Azar, Hassane S., Managing a video encoder to facilitate loading and executing another program.
  28. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Method and apparatus for distributed signal processing among internetworked wireless integrated network sensors (WINS).
  29. Yu Philip Shi-Lung, Method and apparatus for dynamic interval-based load balancing.
  30. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Method and apparatus for internetworked wireless integrated network sensor (WINS) nodes.
  31. Anderson Glen J., Method and apparatus for operating an electronic device at an optimal power mode based upon a scheduled event.
  32. Savransky, Guillermo; Rotem, Efraim; Anati, Ittai; Lamdan, Oren, Method and apparatus to estimate energy consumed by central processing unit core.
  33. Bose,Pradip; Buyuktosunoglu,Alper; Cher,Chen Yong; Kudva,Prabhakar N., Method and system for controlling power in a chip through a power-performance monitor and control unit.
  34. Gelvin,David C.; Girod,Lewis D.; Kaiser,William J.; Merrill,William M.; Newberg,Fredric; Pottie,Gregory J.; Sipos,Anton I.; Vardhan,Sandeep, Method for collecting and processing data using internetworked wireless integrated network sensors (WINS).
  35. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Method for collecting data using compact internetworked wireless integrated network sensors (WINS).
  36. Gelvin, David C.; Girod, Lewis D.; Kaiser, William J.; Merrill, William M.; Newberg, Fredric; Pottie, Gregory J.; Sipos, Anton I.; Vardhan, Sandeep, Method for internetworked hybrid wireless integrated network sensors (WINS).
  37. He, Zhiqiang; Guo, Zihua, Method for reducing power consumption of processor.
  38. Gary,Scott P.; Cyran,Robert J.; Sarathy,Vijaya B. P.; Pradhan,Devendra, Methodology for coordinating and tuning application power.
  39. Yamazaki, Takeshi; Brown, Jeffrey Douglas; Clark, Scott Douglas; Johns, Charles Ray, Methods and apparatus for facilitating coherency management in distributed multi-processor system.
  40. Iwamoto, Tatsuya, Methods and apparatus for segmented stack management in a processor system.
  41. Warrier, Ulhas; Tickoo, Omesh, Methods and apparatuses for core allocations.
  42. Gary,Scott P.; Cyran,Robert J.; Sarathy,Vijaya B. P., Methods and systems for performing dynamic power management via frequency and voltage scaling.
  43. Albonesi, David; Semeraro, Greg; Magklis, Grigorios; Scott, Michael L.; Balasubramonian, Rajeev; Dwarkadas, Sandhya, Multiple clock domain microprocessor.
  44. Albonesi,David; Semeraro,Greg; Magklis,Grigorios; Scott,Michael L.; Balasubramonian,Rajeev; Dwarkadas,Sandhya, Multiple clock domain microprocessor.
  45. Joy, William N.; Tremblay, Marc; Lauterbach, Gary; Chamdani, Joseph I., Multiple-thread processor with single-thread interface shared among threads.
  46. Barth, Andy; Dall'Acqua, Daniele; Drew, Nigel, Performance estimation for adjusting processor parameter to execute a task taking account of resource available task inactive period.
  47. Catthoor Francky,BEX ; Miranda Miguel,BEX ; Janssens Stefan,BEX ; De Man Hugo,BEX, Power-and speed-efficient data storage/transfer architecture models and design methodologies for programmable or reusable multi-media processors.
  48. Conti, Gregory R.; Dahan, Franck, Processor system with an application and a maintenance function.
  49. Williams,Larry Lynn, Storage device having a lateral storage director.
  50. Joy, William N.; Tremblay, Marc; Lauterbach, Gary; Chamdani, Joseph I., Switching method in a multi-threaded processor.
  51. Joy, William N.; Tremblay, Marc; Lauterbach, Gary; Chamdani, Joseph I., Switching method in a multi-threaded processor.
  52. Joy,William N.; Tremblay,Marc; Lauterbach,Gary; Chamdani,Joseph I., Switching method in a multi-threaded processor.
  53. Cervini, Stefano, System and method for efficiently executing single program multiple data (SPMD) programs.
  54. Jackson, David Brian, System and method for managing energy consumption in a compute environment.
  55. Jackson, David Brian, System and method for managing energy consumption in a compute environment.
  56. Jackson, David Brian, System and method for managing energy consumption in a compute environment.
  57. Jackson, David Brian, System and method for managing energy consumption in a compute environment.
  58. Jackson, David Brian, System and method for managing energy consumption in a compute environment.
  59. Hoffberg, Steven M., System and method for providing a payment to a non-winning auction participant.
  60. Ghose, Kanad, System and method for reducing power requirements of microprocessors through dynamic allocation of datapath resources.
  61. Ghose, Kanad, System and method for reducing power requirements of microprocessors through dynamic allocation of datapath resources.
  62. Ghose,Kanad; Ponomarev,Dmitry V.; Kucuk,Gurhan, System and method for reducing power requirements of microprocessors through dynamic allocation of datapath resources.
  63. Li, Cheng-Wei; Shen, Chung-Chou, System having minimum latency using timed mailbox to issue signal in advance to notify processor of the availability of the shared resources.
  64. Jacobson, Hans M.; Kursun, Eren, Task assignment on heterogeneous three-dimensional/stacked microarchitectures.
  65. Chauvel,Gerard; D'Inverno,Dominique, Task based adaptative profiling and debugging.
  66. Chauvel,Gerard; D'Inverno,Dominique; Edwards,Darvin R., Temperature field controlled scheduling for processing systems.
  67. Chaparro,Pedro; Gonzalez,Jose; Gonzalez,Antonio, Temperature-aware steering mechanism.
  68. William N. Joy ; Marc Tremblay ; Gary Lauterbach ; Joseph I. Chamdani, Thread switch logic in a multiple-thread processor.
  69. William N. Joy ; Marc Tremblay ; Gary Lauterbach ; Joseph I. Chamdani, Vertically and horizontally threaded processor with multidimensional storage for storing thread data.

이 특허를 인용한 특허 (3)

  1. Ghose, Kanad, Energy aware processing load distribution system and method.
  2. Ghose, Kanad, System and method for activation of a plurality of servers in dependence on workload trend.
  3. Milenkovic, Milan; Hanebutte, Ulf R.; Srinivasan, Vasudevan, Techniques for adaptive demand/response energy management of electronic systems.
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