초록 ▼

A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit elemen

A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.

대표청구항 ▼

1. A biasing network for superconducting quantum flux circuits, comprising a plurality of parallel circuit branches, each branch comprising at least one Josephson junction circuit element and a bias element configured to control a bias current to the respective branch, each bias element being indepe

1. A biasing network for superconducting quantum flux circuits, comprising a plurality of parallel circuit branches, each branch comprising at least one Josephson junction circuit element and a bias element configured to control a bias current to the respective branch, each bias element being independently selected from the group consisting of:a bias resistor in series with the at least one Josephson junction circuit element, and substantially without a shunt resistor in parallel with the Josephson junction circuit element, the bias resistor being effective for critically damping the Josephson junction;a superconducting inductor in series with the Josephson junction circuit element, the superconducting inductor having respective inductance Ln such that the bias current of the respective branch In is inversely proportional to Ln where Ln In is greater than Φ0=h/2e=2 mA-pH; anda bias Josephson junction in series with a superconducting inductor, in series with a critically damped Josephson junction circuit element, each bias Josephson junction Jn in series with the superconducting inductor having a critical current Ic equal to a desired bias current In for the Josephson junction circuit element. 2. The biasing network according to claim 1, wherein the bias element for at least one branch comprises the bias resistor in series with the at least one Josephson junction circuit element. 3. The biasing network according to claim 1, wherein the bias element for at least one branch comprises the superconducting inductor in series with the at least one Josephson junction circuit element. 4. The biasing network according to claim 1, wherein the bias element for at least one branch comprises the bias Josephson junction in series with a superconducting inductor, in series with a critically damped Josephson junction circuit element. 5. The biasing network according to claim 4, wherein the bias Josephson junction in series with a superconducting inductor functions as a current limiter. 6. The biasing network according to claim 1, wherein each bias element comprises the bias resistor which is configured to achieve critical damping of the at least one Josephson junction circuit element, substantially without a shunt resistor in parallel with the at least one Josephson junction circuit element. 7. The biasing network according to claim 1, wherein each bias element comprises the superconducting inductor in series with the Josephson junction circuit element, and each bias element is substantially without resistive losses, and the value of the respective inductance Ln of each respective superconducting inductor is selected such that the bias current of the given branch In is inversely proportional to Ln, where Ln In is much greater than Φ0=h/2e=2 mA-pH. 8. The biasing network according to claim 1, wherein each bias element comprises a single node that exhibits a maximum average DC voltage Vmax, and at least one other node that exhibits a maximum average DC voltage Vn