Avago Technologies General IP (Singapore) Pte. Ltd.
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초록▼
Systems, circuits, and methods for operating an Insulated-Gate Bipolar Transistor (IGBT) are provided. A switching circuit is described that includes a first current path and a second current path. The first current path carries current away from the gate of the IGBT during a first phase of switchin
Systems, circuits, and methods for operating an Insulated-Gate Bipolar Transistor (IGBT) are provided. A switching circuit is described that includes a first current path and a second current path. The first current path carries current away from the gate of the IGBT during a first phase of switching and the second current path carries current away from the gate of the IGBT during a second phase of switching.
대표청구항▼
1. A circuit, comprising: at least one Insulated-Gate Bipolar Transistor (IGBT) having a gate, collector, and emitter;a first driver for the at least one IGBT, the first driver configured to provide a driving current to the gate of the IGBT;a load connected to the emitter of the at least one IGBT; a
1. A circuit, comprising: at least one Insulated-Gate Bipolar Transistor (IGBT) having a gate, collector, and emitter;a first driver for the at least one IGBT, the first driver configured to provide a driving current to the gate of the IGBT;a load connected to the emitter of the at least one IGBT; anda turn-off circuit connected between the gate of the IGBT and the first driver, the turn-off circuit being configured to dynamically shut down current flowing through the IGBT in the absence of a clamping diode. 2. The circuit of claim 1, wherein the turn-off circuit operates in two phases, wherein during a first of the two phases the turn-off circuit implements a fast initial discharge from the gate. 3. The circuit of claim 2, wherein the fast initial discharge controls a Miller plateau of the IGBT. 4. The circuit of claim 3, wherein during a second phase of the two phases the turn-off circuit holds a gate-to-emitter voltage of the IGBT at a predetermined value for a predetermined amount of time that determines a peak collector-to-emitter voltage of the IGBT. 5. The circuit of claim 4, wherein the first phase and second phase are applied during short-circuit events. 6. The circuit of claim 4, wherein the first phase and the second phase are applied during normal switching events as well as short-circuit events for the IGBT. 7. The circuit of claim 4, wherein current flow through a capacitor during the first phase and wherein the capacitor becomes fully charged the second phase begins until the first driver is turned off. 8. The circuit of claim 1, wherein the turn-off circuit comprises a first resistor connected in parallel with a capacitor between the gate of the IGBT and the emitter of the IGBT. 9. The circuit of claim 8, wherein the turn-off circuit further comprises a second resistor that is connected in series with the first resistor and capacitor. 10. The circuit of claim 1, wherein the turn-off circuit comprises a first resistor connected in parallel with a capacitor between the gate of the IGBT and an output of the driver. 11. The circuit of claim 10, wherein the turn-off circuit further comprises a second resistor that is connected in series with the first resistor and capacitor. 12. An Insulated-Gate Bipolar Transistor (IGBT) switching circuit configured to dynamically shut down the IGBT during normal switching and/or short-circuit events, wherein the IGBT comprises a gate, collector, and emitter, wherein the IGBT is driven by a driver, and wherein the switching circuit comprises: a first current path that carries current away from the gate of the IGBT during a first phase of switching in which the gate of the IGBT is discharged through a primary resistor and a capacitor; anda second current path that carries current away from the gate of the IGBT during a second phase of switching in which the capacitor is fully charged but the IGBT is still carrying current from the collector to the emitter, wherein during the second phase current does not flow through the capacitor but instead flows through the primary resistor and another resistor connected in parallel with the capacitor. 13. The switching circuit of claim 12, wherein the first current path and second current path both flow from the gate of the IGBT to the driver. 14. The switching circuit of claim 12, wherein the first current path and second current path both flow from the gate of the IGBT to the emitter of the IGBT. 15. The switching circuit of claim 12, wherein the resistor connected in parallel with the capacitor is at least twice as large as the primary resistor. 16. The switching circuit of claim 12, wherein the first and second current paths are used during normal switching events and short-circuit events. 17. The switching circuit of claim 12, further comprising a switching transistor connected between the gate of the IGBT and the first and second current paths. 18. A method of operating an Insulated-Gate Bipolar Transistor (IGBT) switching circuit, the method comprising: determining that the IGBT is switching between a first operational state and a second operational state;in response to the IGBT switching from the first operational state to the second operational state, initially discharging current from a gate of the IGBT during a first phase of dynamic shutdown;following the first phase of dynamic shutdown, implementing a second phase of dynamic shutdown during which a gate-to-emitter voltage of the IGBT is supported for a predetermined amount of time that controls a collector-to-emitter voltage of the IGBT during switching from the first operational state to the second operational state. 19. The method of claim 18, wherein the first operational state corresponds to an ON state and wherein the second operational state corresponds to an OFF state. 20. The method of claim 18, wherein current flows through a shut-down capacitor during the first phase and current is substantially prohibited from flowing through the shut-down capacitor during the second phase.
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이 특허에 인용된 특허 (3)
Koyama Eiji,JPX ; Watanabe Takashi,JPX, Driver circuit and a method for generating a driving signal.
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