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Molybdenum barrier metal for SiC Schottky diode and process of manufacture 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/28
  • H01L-021/44
  • H01L-029/872
  • H01L-029/16
  • H01L-029/47
  • H01L-029/66
  • H01L-029/06
출원번호 US-0888452 (2007-07-31)
등록번호 US-9496420 (2016-11-15)
발명자 / 주소
  • Richieri, Giovanni
출원인 / 주소
  • Vishay-Siliconix
인용정보 피인용 횟수 : 0  인용 특허 : 100

초록

A method for fabricating a diode is disclosed. In one embodiment, the method includes forming a Schottky contact on an epitaxial layer of silicon carbide (SiC) and annealing the Schottky contact at a temperature in the range of 300° C. to 700° C. The Schottky contact is formed of a layer of molybden

대표청구항

1. A method for fabricating a diode, said method comprising: forming a Schottky contact on an epitaxial layer of silicon carbide (SiC) wherein a ring termination region is formed in said epitaxial layer of silicon carbide (SiC) below a passivation layer, and wherein said Schottky contact comprises a

이 특허에 인용된 특허 (100)

  1. Kinzer Daniel M., Amorphous silicon combined with resurf region for termination for MOSgated device.
  2. Ren, Liping; Sridevan, Srikant, Angle implant process for cellular deep trench sidewall doping.
  3. Zandman, Felix; Kasem, Y. Mohammed; Ho, Yueh-Se, Chip scale surface mount package for semiconductor device and process of fabricating the same.
  4. Standing, Martin; Schofield, Hazel Deborah, Chip scale surface mounted device and process of manufacture.
  5. Bakowski Mietek,SEX ; Gustafsson Ulf,SEX, Depletion region stopper for PN junction in silicon carbide.
  6. von Windheim Jesko (Raleigh NC) Venkatesan Vasudev (Phoenix AZ), Diamond-based chemical sensors.
  7. Kipp J. Schoen ; Jason P. Henning ; Jerry M. Woodall ; James A. Cooper, Jr. ; Michael R. Melloch, Dual-metal-trench silicon carbide Schottky pinch rectifier.
  8. Pfirsch Frank,DEX ; Rupp Roland,DEX, Edge termination for a semiconductor component, a schottky diode having an edge termination, and a method for producing the schottky diode.
  9. Furukawa Katsuki (Sakai JPX) Suzuki Akira (Nara JPX) Shigeta Mitsuhiro (Nara JPX) Uemoto Atsuko (Nara JPX), Electrode structure for silicon carbide semiconductors.
  10. Singh, Ranbir, Epitaxial edge termination for silicon carbide Schottky devices and methods of fabricating silicon carbide devices incorporating same.
  11. Bakowski Mietek,SEX ; Gustafsson Ulf,SEX ; Rottner Kurt,SEX ; Savage Susan,SEX, Fabrication of a SiC semiconductor device comprising a pn junction with a voltage absorbing edge.
  12. Marchant, Bruce D., Field effect transistor having a lateral depletion structure.
  13. Swanson, Leland; Howard, Gregory, Guard ring structure for a Schottky diode.
  14. Kim Jong O. (Seoul KRX) Kim Jin H. (Chung-Buk KRX), High breakdown voltage semiconductor device.
  15. Norio Yasuhara JP; Kazutoshi Nakamura JP; Yusuke Kawaguchi JP, High breakdown voltage semiconductor device having trenched film connected to electrodes.
  16. Hshieh Fwu-Iuan (Saratoga CA) Chang Mike F. (Cupertino CA) Chen Kuo-In (Los Altos CA) Williams Richard K. (Cupertino CA) Darwish Mohamed (Saratoga CA), High density trenched DMOS transistor.
  17. Tachibana Takeshi (Osaka NC JPX) Thompson ; Jr. Dale G. (Chapel Hill NC) Glass Jeffrey T. (Apex NC), High temperature rectifying contact including polycrystalline diamond and method for making same.
  18. Deboy, Gerald; Ahlers, Dirk; Strack, Helmut; Rueb, Michael; Weber, Hans, High-voltage semiconductor component.
  19. Deboy, Gerald; Ahlers, Dirk; Strack, Helmut; Rueb, Michael; Weber, Hans Martin, High-voltage semiconductor component.
  20. Steigerwald, Daniel A.; Lester, Steven D.; Wierer, Jr., Jonathan J., Highly reflective ohmic contacts to III-nitride flip-chip LEDs.
  21. Krames, Michael R; Steigerwald, Daniel A.; Kish, Jr., Fred A.; Rajkomar, Pradeep; Wierer, Jr., Jonathan J.; Tan, Tun S, III-nitride light-emitting device with increased light generating capability.
  22. Bakowski Mietek,SEX ; Gustafsson Ulf,SEX, Junction termination for SiC Schottky diode.
  23. Ranadeep Dutta, Low dosage field rings for high voltage semiconductor device.
  24. Ngo Khai D. T. (Schenectady NY) Steigerwald Robert L. (Burnt Hills NY) Walden John P. (Schenectady NY) Baliga Bantval J. (Schenectady NY) Korman Charles S. (Schenectady NY) Chang Hsueh-Rong (Scotia N, Low noise, high frequency synchronous rectifier.
  25. Ueno Katsunori,JPX ; Urushidani Tatsuo,JPX ; Hashimoto Koichi,JPX ; Ogino Shinji,JPX ; Seki Yasukazu,JPX, Manufacturing method of SiC Schottky diode.
  26. Seng,William F.; Woodin,Richard L.; Witt,Carl Anthony, Method and device with durable contact on silicon carbide.
  27. Aoki Nobutoshi,JPX ; Mizushima Ichiro,JPX, Method and equipment for manufacturing semiconductor device.
  28. Tactic Lucic,Svetlana, Method for fabricating micro-electro-mechanical systems.
  29. Lee,Jin Yuan; Lin,Eric, Method for fabricating thermal compliant semiconductor chip wiring structure for chip scale packaging.
  30. Darwish, Mohamed N., Method for making trench mosfet having implanted drain-drift region.
  31. Collard, Emmanuel, Method for producing a schottky diode in silicon carbide.
  32. H?gerl, J?rgen, Method for producing a semiconductor wafer, semiconductor chip, and intermediate semiconductor product.
  33. Stengl Reinhard (Munich DEX) Goesele Ulrich (Hoehenkirchen DEX) Fellinger Christine (Munich DEX), Method for the manufacture of a pn junction with high breakdown voltage.
  34. Shook James Gill, Method of and apparatus for sealing an hermetic lid to a semiconductor die.
  35. Dixit Pankaj (San Jose CA) Ingram ; III William P. (Los Altos CA) Holzworth Monta R. (Santa Clara CA) Klein Richard (Mountain View CA), Method of fabricating antifuses in an integrated circuit device and resulting structure.
  36. Baliga Bantval J. (Raleigh NC) Alok Dev (Raleigh NC), Method of forming trenches in monocrystalline silicon carbide.
  37. Parsons James D., Method of making Os and W/WC/TiC ohmic and rectifying contacts on SiC.
  38. Wierer, Jr., Jonathan J.; Krames, Michael R; Steigerwald, Daniel A.; Kish, Jr., Fred A.; Rajkomar, Pradeep, Method of making a III-nitride light-emitting device with increased light generating capability.
  39. Kobayashi Sadao (Hachioji JA), Method of making a junction type field effect transistor.
  40. Grigg, Ford B., Methods for manufacturing microelectronic devices and methods for mounting microelectronic packages to circuit boards.
  41. Hsu, Shih-Ping, Package substrate and method for fabricating the same.
  42. Dev Alok ; Emil Arnold, Passivated silicon carbide devices with low leakage current and method of fabricating.
  43. Standing, Martin, Paste for forming an interconnect and interconnect formed from the paste.
  44. Stengl Reinhard (Stadtbergen DEX), Planar pn-junction of high electric strength.
  45. Yasunori Usui JP; Shigeo Kouzuki JP, Power MOSFET having laterally three-layered structure formed among element isolation regions.
  46. Gi-young Jeon KR; Eul-bin Im KR; Byeong Gon Kim KR; Eun-ho Lee KR, Power module package having insulator type heat sink attached to rear surface of lead frame and manufacturing method thereof.
  47. Stoisiek, Michael, Power semiconductor component having a PN junction with a low area edge termination.
  48. Kozo Sakamoto JP; Yosuke Inoue JP; Akihiro Miyauchi JP; Masaki Shiraishi JP; Mutsuhiro Mori JP; Atsuo Watanabe JP; Takasumi Ohyanagi JP, Power semiconductor device.
  49. Carta, Rossano; Bellemo, Laura; Richieri, Giovanni; Merlin, Luigi, Power semiconductor switch.
  50. Lizotte Steven C., Process for filling deep trenches with polysilicon and oxide.
  51. Nakamura,Tomonori; Tsuchida,Hidekazu; Miyanagi,Toshiyuki, Process for producing Schottky junction type semiconductor device.
  52. Milewski Joseph M. ; Woychik Charles G., Process to produce a high temperature interconnection.
  53. Hayashi, Kenichi; Kawafuji, Hisashi; Tajiri, Mitsugu; Shikano, Taketoshi, Resin-molded device and manufacturing apparatus thereof.
  54. Loose Werner,DEX ; Korec Jacek,DEX ; Niemann Ekkehard,DEX ; Boos Alfred,DEX, SIC field-effect transistor array with ring type trenches and method of producing them.
  55. Miyasaka Yasushi,JPX, Schottky barrier diode having a guard ring structure.
  56. Okada,Tetsuya; Saito,Hiroaki, Schottky barrier diode semiconductor device.
  57. Gould Herbert J. (Hawthorne CA), Schottky device and method of manufacture using palladium and platinum intermetallic alloys and titanium barrier.
  58. Carta, Rossano; Merlin, Luigi; Bellemo, Laura, Schottky diode with improved surge capability.
  59. Mitlehner Heinz (Munich DEX), Schottky power diode.
  60. Oppermann, Klaus-Günter; Tihanyi, Jenö, Semiconductor component for high reverse voltages in conjunction with a low on resistance and method for fabricating a semiconductor component.
  61. Mitlehner Heinz,DEX ; Stephani Dietrich,DEX ; Weinert Ulrich,DEX, Semiconductor component having an edge termination means with high field blocking capability.
  62. Aida, Satoshi; Kouzuki, Shigeo; Izumisawa, Masaru; Yoshioka, Hironori; Saito, Wataru, Semiconductor device.
  63. Fukuda,Kenji; Kosugi,Ryouji; Harada,Shinsuke; Senzaki,Junji; Kojima,Kazutoshi; Kuroda,Satoshi, Semiconductor device.
  64. Hatakeyama, Tetsuo; Shinohe, Takashi, Semiconductor device.
  65. Iwamoto, Susumu; Fujihira, Tatsuhiko; Ueno, Katsunori; Onishi, Yasuhiko; Sato, Takahiro, Semiconductor device.
  66. Iwamoto, Susumu; Fujihira, Tatsuhiko; Ueno, Katsunori; Onishi, Yasuhiko; Sato, Takahiro; Nagaoka, Tatsuji, Semiconductor device.
  67. Kouzuki, Shigeo; Okumura, Hideki; Kobayashi, Hitoshi; Aida, Satoshi; Izumisawa, Masaru; Osawa, Akihiko, Semiconductor device.
  68. Ota, Chiharu; Nishio, Johji; Hatakeyama, Tetsuo; Shinohe, Takashi, Semiconductor device.
  69. Tanaka,Masahiro, Semiconductor device.
  70. Okuda, Hidekazu; Amada, Haruo; Hashimoto, Taizo, Semiconductor device and manufacturing method of the same.
  71. Etou Hiroki,JPX ; Ohno Kazunori,JPX ; Saito Takaaki,JPX ; Tsuchiya Naofumi,JPX ; Utsumi Toshinari,JPX, Semiconductor device and method of manufacturing the same.
  72. Yamagishi Hidetaka (Tokyo JPX), Semiconductor device having Schottky barrier between metal silicide and silicon.
  73. Onishi, Yasuhiko; Fujihira, Tatsuhiko; Iwamoto, Susumu; Sato, Takahiro, Semiconductor device having breakdown voltage limiter regions.
  74. Kamasaki Keiji (Kanagawa JPX) Dengo Tadao (Kanagawa JPX) Fukuda Ikuo (Fukuoka JPX) Motojima Hideaki (Kanagawa JPX), Semiconductor device having high resistance to electrostatic and electromagnetic induction using a complementary shield.
  75. Friedrichs, Peter; Peters, Dethard; Schoerner, Reinhold, Semiconductor device made from silicon carbide with a Schottky contact and an ohmic contact made from a nickel-aluminum material.
  76. Standing,Martin, Semiconductor device package utilizing proud interconnect material.
  77. Okamura,Yuji; Matsushita,Masashi, Semiconductor device with a silicon carbide substrate and ohmic metal layer.
  78. Fujihira, Tatsuhiko, Semiconductor device with alternating conductivity type layer and method of manufacturing the same.
  79. Bakowsky Mietek,SEX ; Bijlenga Bo,SEX ; Gustafsson Ulf,SEX ; Harris Christopher,SEX ; Savage Susan,SEX, SiC Semiconductor device comprising a pn Junction with a voltage absorbing edge.
  80. Bakowski Mietek,SEX ; Gustafsson Ulf,SEX ; Harris Christopher I.,SEX, SiC semiconductor device comprising a pn junction.
  81. Richieri, Giovanni, Silicon carbide Schottky diode.
  82. Baliga Bantval J. (Raleigh NC), Silicon carbide field effect device.
  83. Baliga Bantval J. (Raleigh NC), Silicon carbide power MOSFET with floating field ring and floating field plate.
  84. Kumar, Rajesh; Yamamoto, Tsuyoshi; Onda, Shoichi; Kataoka, Mitsuhiro; Hara, Kunihiko; Okuno, Eiichi; Kojima, Jun, Silicon carbide semiconductor device.
  85. Kumar,Rajesh; Yamamoto,Tsuyoshi; Nakamura,Hiroki, Silicon carbide semiconductor device and manufacturing method.
  86. Gould Herbert J. (Sherman Oaks CA), Solderable front metal contact for MOS devices.
  87. Carta,Rossano; Bellemo,Laura; Merlin,Luigi, Solderable top metal for SiC device.
  88. Standing, Martin; Sawle, Andrew; Elwin, Matthew P; Jones, David P; Carroll, Martin; Wagstaffe, Ian Glenville, Solderable top metalization and passivation for source mounted package.
  89. Thapar Naresh I. ; Shenoy Praveen Muraleedharan ; Baliga Bantval Jyant, Static-induction transistors having heterojunction gates and methods of forming same.
  90. Patel Viren C., Structure to provide junction breakdown stability for deep trench devices.
  91. Zhou, Ming, Superjunction device with improved avalanche capability and breakdown voltage.
  92. Sridevan,Srikant, Superjunction device with improved ruggedness.
  93. Kinzer,Daniel M., Superjunction power semiconductor device.
  94. Qu, Zhijun, Termination structure for superjunction device.
  95. Cabal,Antonio; Lebens,John A.; Bond,Stephen F., Thermally conductive thermal actuator and liquid drop emitter using same.
  96. Chang, Moh-Ching Oliver; Chang, Yin-Shen, Thermoplastic compositions providing matt surface.
  97. Henson, Timothy, Trench MOSFET superjunction structure and method to manufacture.
  98. Van Dalen, Rob; Rochefort, Christelle; Hurkx, Godefridus A. M., Trench semiconductor devices.
  99. Uenishi Akio,JPX ; Minato Tadaharu,JPX, Trenched high breakdown voltage semiconductor device.
  100. Metz ; Jr. Werner A. (Fort Collins CO) Szluk Nicholas J. (Fort Collins CO) Miller Gayle W. (Fort Collins CO) Drury Michael J. (Fort Collins CO) Sullivan Paul A. (Fort Collins CO), Use of selectively deposited tungsten for contact formation and shunting metallization.
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