초록 ▼

The present disclosure is directed to a system for battery management and protection. A battery protection circuit may include a power semiconductor switch and a control integrated circuit (IC). The battery protection circuit may be configured to regulate the charging and/or discharging of a battery

The present disclosure is directed to a system for battery management and protection. A battery protection circuit may include a power semiconductor switch and a control integrated circuit (IC). The battery protection circuit may be configured to regulate the charging and/or discharging of a battery and further prevent the battery from operating outside of a safe operating area based on a protection trip point (e.g. overcurrent detection point) of the protection IC. The protection IC may be configured to calibrate a protection trip point so as to compensate for process and temperature variations of on resistance (RSSon) of the power semiconductor switch.

대표청구항 ▼

1. A system for battery management and protection, comprising: a power source; andprotection circuitry to protect the power source, wherein the protection circuitry includes:at least two metal-oxide-semiconductor field-effect transistor switches to control current going to the power source and curre

1. A system for battery management and protection, comprising: a power source; andprotection circuitry to protect the power source, wherein the protection circuitry includes:at least two metal-oxide-semiconductor field-effect transistor switches to control current going to the power source and current coming from the power source; anda protection integrated circuit to set at least an overcurrent detection point in the protection circuitry based on a source-to-source on state resistance measured for each of the at least two metal-oxide-semiconductor field-effect transistor switches and control operation of the at least two metal-oxide-semiconductor field-effect transistor switches based at least on the overcurrent detection point. 2. The system of claim 1, wherein the protection circuitry comprises a multichip module. 3. The system of claim 1, wherein the source-to-source on state resistance is measured by the protection integrated circuit during operation of the protection circuitry. 4. The system of claim 1, wherein the source-to-source on state resistance is measured during manufacture of the multichip module. 5. A device for battery management and protection, comprising: a power semiconductor switch; anda protection integrated circuit to control the power semiconductor switch based at least on an overcurrent detection point, the protection integrated circuit being calibrated based on a source-to-source on state resistance measured for the power semiconductor switch. 6. The device of claim 5, wherein the power semiconductor switch includes at least two metal-oxide-semiconductor field-effect transistor switches. 7. The device of claim 6, wherein the protection integrated circuit is to control a first metal-oxide-semiconductor field-effect transistor switch to control the current going to a power source and a second metal-oxide-semiconductor field-effect transistor switch to control the current coming from the power source. 8. The device of claim 5, wherein the source-to-source on state resistance is measured during manufacture of the device. 9. A method for battery management and protection, comprising: assembling a device comprising at least a protection integrated circuit and at least two metal-oxide-semiconductor field-effect transistor switches to control current going to a power source and current coming from the power source;determining an overcurrent detection point for at least the power semiconductor switch based on a source-to-source on state resistance measured for each of the at least two metal-oxide-semiconductor field-effect transistor switches; andsetting the overcurrent detection point in the protection integrated circuit based on the source-to-source on state resistance. 10. The method of claim 9, wherein setting the overcurrent detection point is based on a trimming technique. 11. The method of claim 9, further comprising: protecting the power source based at least on the overcurrent detection point. 12. The method of claim 11, wherein protecting the power source comprises: measuring at least one of a current flowing from the power source or a current flowing to the power source;evaluating the measurement based on the overcurrent detection point; andcontrolling operation of the at least two metal-oxide-semiconductor field-effect transistor switches based at least on the evaluation of the measurement.