[특허]Shallow trench textured regions and associated methods

Shallow trench textured regions and associated methods 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-027/146 H01L-031/028 H01L-031/18 H01L-031/0232
출원번호	US-0884181 (2015-10-15)
등록번호	US-9673250 (2017-06-06)
발명자 / 주소	Haddad, Homayoon Jiang, Jutao
출원인 / 주소	SiOnyx, LLC
대리인 / 주소	Engellenner, Thomas J.
인용정보	피인용 횟수 : 5 인용 특허 : 263

초록 ▼

Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with el

대표청구항 ▼

1. An optoelectronic device having enhanced absorption of electromagnetic radiation, comprising: a semiconductor layer coupled to a support substrate;a first bonding layer coupled between the semiconductor layer and the support substrate;a second bonding layer positioned between the first bonding layer and the support substrate;a reflector layer disposed between the first bonding layer and the second bonding layer; andan array of shallow trench isolation surface features positioned between the semiconductor layer and the support substrate, the surface features positioned to interact with electromagnetic radiation that passes through the semiconductor layer, wherein the surface features are formed in the semiconductor layer. 2. The device of claim 1, wherein the semiconductor layer is single crystal silicon. 3. The device of claim 1, wherein the first bonding layer is coupled between the support substrate and the surface features. 4. The device of claim 1, wherein the surface features have an at least substantially uniform height. 5. The device of claim 1, wherein the surface features are not uniform in height. 6. The device of claim 1, further comprising a device layer coupled to the semiconductor layer on a side opposite the surface features. 7. The device of claim 1, wherein the device is architecturally configured as a front-side illuminated optoelectronic device. 8. The device of claim 1, wherein the device is architecturally configured as a back-side illuminated optoelectronic device. 9. The device of claim 1, wherein the surface features are arranged according to a predetermined pattern. 10. The device of claim 9, wherein the predetermined pattern is an at least substantially uniform grid. 11. The device of claim 9, wherein the predetermined pattern is a non-uniform arrangement. 12. A method of making an optoelectronic device, comprising: creating an array of surface features on at least a portion of a surface of a support substrate using shallow trench isolation etching; andbonding the array of surface features between the support substrate and a semiconductor layer. 13. The method of claim 12, wherein bonding the array of surface features between the support substrate and the semiconductor layer further includes: depositing a first bonding layer onto the semiconductor layer; andbonding the first bonding layer to a second bonding layer disposed on the support substrate. 14. An optoelectronic device having enhanced absorption of electromagnetic radiation, comprising: a semiconductor layer coupled to a support substrate;a first bonding layer coupled between the semiconductor layer and the support substrate;a second bonding layer positioned between the first bonding layer and the support substrate;a reflector layer disposed between the first bonding layer and the second bonding layer; andan array of shallow trench isolation surface features positioned between the semiconductor layer and the support substrate, the surface features positioned to interact with electromagnetic radiation that passes through the semiconductor layer, wherein the surface features are formed in the support substrate. 15. The device of claim 14, wherein the semiconductor layer is single crystal silicon. 16. The device of claim 14, wherein the first bonding layer is coupled between the support substrate and the surface features. 17. The device of claim 14, wherein the surface features have an at least substantially uniform height. 18. The device of claim 14, wherein the surface features are not uniform in height. 19. The device of claim 14, further comprising a device layer coupled to the semiconductor layer on a side opposite the surface features. 20. The device of claim 14, wherein the device is architecturally configured as a front-side illuminated optoelectronic device. 21. The device of claim 14, wherein the device is architecturally configured as a back-side illuminated optoelectronic device. 22. The device of claim 14, wherein the surface features are arranged according to a predetermined pattern. 23. The device of claim 22, wherein the predetermined pattern is an at least substantially uniform grid. 24. The device of claim 22, wherein the predetermined pattern is a non-uniform arrangement.

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Kaminsky, Cheryl J.; Bourdelais, Robert P.; Pratt, Steven M.; Lioy, Daniel C., Patterned roller for the micro-replication of complex lenses.
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Lang Charles D. (Wysox PA) McCalmont Scott D. (Athens PA) Choi John (Sayre PA) Hou Anchi (Towanda PA) Shobert Alan (Sayre PA), Peel-apart photosensitive element.
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Murakami,Ichiro, Photo-electric converting device and its driving method, and its manufacturing method, solid-state image pickup device and its driving method and its manufacturing method.
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Wäny, Martin, Photodetector and method for detecting radiation.
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Morikawa Takenori,JPX, Photodetector and method for fabricating same.
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Yamamura, Kazuhisa; Sakamoto, Akira; Nagano, Terumasa; Ishikawa, Yoshitaka; Kawai, Satoshi, Photodiode and photodiode array.
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Yamamura, Kazuhisa; Sakamoto, Akira; Nagano, Terumasa; Ishikawa, Yoshitaka; Kawai, Satoshi, Photodiode and photodiode array.
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Yamamura, Kazuhisa; Sakamoto, Akira; Nagano, Terumasa; Ishikawa, Yoshitaka; Kawai, Satoshi, Photodiode and photodiode array.
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Webb Paul P. (Beaconsfield CAX), Photodiode having enhanced long wavelength response.
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Yamamura, Kazuhisa; Sakamoto, Akira; Nagano, Terumasa, Photodiode manufacturing method and photodiodes.
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Haddad, Homayoon; Jiang, Jutao; McKee, Jeffrey; Miller, Drake; Forbes, Leonard; Palsule, Chintamani, Photosensitive imaging devices and associated methods.
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Haddad, Homayoon; Jiang, Jutao; McKee, Jeffrey; Miller, Drake; Palsule, Chintamani; Forbes, Leonard, Photosensitive imaging devices and associated methods.
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Janz Siegfried,CAX ; Lafontaine Hughes,CAX ; Xu Dan-Xia,CAX, Phototonic device with strain-induced three dimensional growth morphology.
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Keppner Herbert (Neuchatel CHX), Photovoltaic cell and method for fabrication of said cell.
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Noguchi Shigeru (Hirakata JPX) Iwata Hiroshi (Neyagawa JPX) Sano Keiichi (Takatuki JPX), Photovoltaic device.
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Noguchi Shigeru,JPX ; Iwata Hiroshi,JPX ; Sano Keiichi,JPX, Photovoltaic device.
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Czubatyj Wolodymyr (Hamtramck MI) Singh Rajendra (Clawson MI) Doehler Joachim (Union Lake MI) Allred David D. (Troy MI) Reyes Jaime M. (Birmingham MI), Photovoltaic device having incident radiation directing means for total internal reflection.
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Matsuyama Jinsho,JPX ; Matsuda Koichi,JPX, Photovoltaic device provided with an opaque substrate having a specific irregular surface structure.
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Warner ; Jr. Raymond M. (Edina MN), Photovoltaic semi-conductor devices.
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Zayhowski John J. (Pepperell MA), Picosecond Q-switched microlasers.
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Rhodes, Howard E., Pinned photodiode structure and method of formation.
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Matsuyama Jinsho,JPX, Process for forming zinc oxide film and processes for producing semiconductor device substrate and photo-electricity generating device using the film.
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Ghirardi Frederic,FRX ; Giraudet Louis,FRX, Process for making a monolithic integrated structure incorporating opto-electronic components and structure made in thi.
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Falster, Robert J.; Voronkov, Vladimir, Process for preparing low defect density silicon using high growth rates.
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Graef Dieter,DEX ; Ammon Wilfried Von,DEX ; Wahlich Reinhold,DEX ; Krottenthaler Peter,DEX ; Lambert Ulrich,DEX, Process for producing silicon semiconductor wafers with low defect density.
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Rohatgi Ajeet ; Doshi Parag ; Tate John Keith ; Mejia Jose ; Chen Zhizhang, Processes for producing low cost, high efficiency silicon solar cells.
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Pezzani Robert (Vouvray FRX), Protection component for automobile circuit.
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Okumura, Hiroshi, Pulse laser irradiation method for forming a semiconductor thin film.
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Mendelson, Yitzhak, Pulse oximeter and method of operation.
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Veeder, Kenton, Response-enhanced monolithic-hybrid pixel.
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Veeder, Kenton, Response-enhanced monolithic-hybrid pixel.
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Trapani Giorgio B. (Cambridge MA), Rigid electro-optic device using a transparent ferroelectric ceramic element.
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Osajda Marc,FRX ; Delpoux Arnaud,FRX, Rotary position sensor with reference and grey scales.
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Green Martin A. (Waverley AUX) Wenham Stuart R. (Illawong AUX) Srinivasamohan Narayanan (Anzac Parade Kensington AUX), Sculpted solar cell surfaces.
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Gifford, Maurice M; Seal, Christopher H; McCartney, David John, Security check provision.
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Weiner Kurt H. (Campbell CA), Selective epitaxy using the gild process.
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Yu Bin, Selective laser anneal process using highly reflective aluminum mask.
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Stuart Ross Wenham AU; Martin Andrew Green AU, Self aligning method for forming a selective emitter and metallization in a solar cell.
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Dyck Rudolph H. (Palo Alto CA) Early James M. (Palo Alto CA), Self-aligned antiblooming structure for charge-coupled devices.
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Tomono Takao (5-4-9 ; Minami ; Shinozaki-cho Kanagawa JPX) Nishikata Tasunari (5-4-9 ; Minami ; Shinozaki-cho Kanagawa JPX) Pu Lyong S. (5-4-9 ; Minami ; Shinozaki-cho Kanagawa JPX) Sasaki Keisuke (5, Self-frequency-doubler laser element.
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Watanabe Atsuo,JPX ; Saito Katsuaki,JPX, Semiconductor device and method of manufacturing same.
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Yamazaki, Shunpei, Semiconductor device and method of manufacturing the same.
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Saito Yutaka,JPX, Semiconductor device having a semiconductor film of low oxygen concentration.
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Sakai Takamasa (Koriyama JPX), Semiconductor device with multi-electrode construction equivalent to variable capacitance diode.
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Ohkawa, Narumi, Semiconductor device, manufacturing process thereof and imaging device.
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Kwon, Doo Won; Yoo, Jong Ryeol; Moon, Chang Rok, Semiconductor devices, CMOS image sensors, and methods of manufacturing same.
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Haus Hermann A. (Lexington MA) Utaka Katsuyuki (Tokyo JPX), Semiconductor element having opposite signs of a 상세보기

IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
구성항목	기본정보 상세정보 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표IPC 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 공고번호, 공고일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표출원인, 출원인국적, 출원인주소, 발명자, 발명자E, 발명자코드, 발명자주소, 발명자 우편번호, 발명자국적, 대표IPC, IPC코드, 요약, 미국특허분류, 대리인주소, 대리인코드, 대리인(한글), 대리인(영문), 국제공개일자, 국제공개번호, 국제출원일자, 국제출원번호, 우선권, 우선권주장일, 우선권국가, 우선권출원번호, 원출원일자, 원출원번호, 지정국, Citing Patents, Cited Patents
저장형식	Text(ASCII format) Excel format PIAS분석(.xls)
메일정보	받는사람 (필수) @ 보내는사람 (선택) @ 제목 내용 KISTI 검색결과 이메일 서비스
안내	총 건의 자료가 검색되었습니다. 다운받으실 자료의 인덱스를 입력하세요. (1-10,000) 검색결과의 순서대로 최대 10,000건 까지 다운로드가 가능합니다. 데이타가 많을 경우 속도가 느려질 수 있습니다.(최대 2~3분 소요) 다운로드 파일은 UTF-8 형태로 저장됩니다. 파일의 내용이 제대로 보이지 않을실 때는 웹브라우저 상단의 보기 -> 인코딩 -> 자동선택 여부를 확인하십시오. ~ Text(ASCII format) Excel format

연합인증

Shallow trench textured regions and associated methods 원문보기

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Shallow trench textured regions and associated methods 원문보기

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대표청구항 ▼

연구과제 타임라인

전체(0) 논문(0) 특허(0) 보고서(0)

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