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Methods and systems for scheduling applications on a multi-core processor are disclosed, which may be based on association of processor cores, application execution environments, and authorizations that permits efficient and practical means to utilize the simultaneous execution capabilities provided

Methods and systems for scheduling applications on a multi-core processor are disclosed, which may be based on association of processor cores, application execution environments, and authorizations that permits efficient and practical means to utilize the simultaneous execution capabilities provided by multi-core processors. The algorithm may support definition and scheduling of variable associations between cores and applications (i.e., multiple associations can be defined so that the cores an application is scheduled on can vary over time as well as what other applications are also assigned to the same cores as part of an association). The algorithm may include specification and control of scheduling activities, permitting preservation of some execution capabilities of a multi-core processor for future growth, and permitting further evaluation of application requirements against the allocated execution capabilities.

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1. A method for scheduling applications on a multi-core processor comprising a plurality of processor cores, the method comprising: associating a first at least two processor cores and a first plurality of address spaces with a first affinity group;associating a second at least one processor core an

1. A method for scheduling applications on a multi-core processor comprising a plurality of processor cores, the method comprising: associating a first at least two processor cores and a first plurality of address spaces with a first affinity group;associating a second at least one processor core and a second plurality of address spaces with a second affinity group; andscheduling one or more of the first affinity group and the second affinity group to execute on associated cores of the multi-core processor, wherein the step of scheduling further comprises:releasing a processor core for scheduling;synchronizing the plurality of processor cores;processing a scheduling event for the released processor core;associating the released processor core with the affinity group associated with the scheduling event; andassigning a plurality of address spaces to the released processor core for the scheduling event. 2. The method of claim 1, wherein the scheduling event comprises task-core affinity for at least one task. 3. The method of claim 1, wherein at least one task-core affinity is designated to be changeable at run-time. 4. The method of claim 1, wherein a task-core affinity is designated not to be changeable at run-time. 5. The method of claim 1, further comprising synchronizing the released processor core with any of the plurality of processor cores associated with the scheduling event. 6. The method of claim 1, further comprising synchronizing the released core with at least one of the plurality of processor cores associated with the affinity group associated with the scheduling event. 7. The method of claim 1, wherein processing the scheduling event comprises selecting an affinity group for which all of the associated cores are available and none of the associated address spaces are currently running on another core. 8. The method of claim 1, wherein the first affinity group comprises at least one dependency group comprising a plurality of address spaces that share at least one resource. 9. The method of claim 8, further comprising scheduling a plurality of address spaces associated with at least one dependency group. 10. The method of claim 8, wherein the second at least one affinity group comprises at least one of the at least one dependency group. 11. The method of claim 1, wherein only applications associated with the first plurality of address spaces are eligible to be scheduled on the first at least one processor core when the first affinity group is being executed. 12. The method of claim 1, wherein at least one of the first plurality of address spaces is a primary address space eligible to run on any of the first at least one processor core. 13. The method of claim 1, wherein at least one of the first plurality of address spaces is a restart address space eligible to restart on any of the first at least one processor core. 14. The method of claim 1, wherein at least one of the first plurality of address spaces is a background address space eligible to run in the backgsound on any of the first at least one processor core. 15. The method of claim 14, wherein the step of scheduling the background address space further comprises scheduling based on a priority less than a predetermined threshold. 16. The method of claim 1, wherein the step of scheduling further comprises activating one of a plurality of schedules for at least one of the associated cores. 17. The method of claim 1, wherein the step of scheduling comprises scheduling the first affinity group and the second affinity group to execute simultaneously on one or more cores of the multi-core processor. 18. The method of claim 1, wherein the first plurality of address spaces comprises at least one address space in the second plurality of address spaces. 19. The method of claim 1, wherein the first at least one affinity group comprises at least one address space in the second at least one affinity group. 20. The method of claim 1, further comprising scheduling a task to run on a processor core according to a task-core affinity for the task. 21. The method of claim 1, further comprising scheduling a task to run on a processor core according to a task-core affinity if the task has an affinity for the processor core associated with the affinity group scheduled for execution. 22. The method of claim 1, further comprising not scheduling a task for execution with an affinity group if the task has an affinity for a processor core that is not associated with the affinity group. 23. The method of claim 1, wherein the step of scheduling further comprises: releasing a first address space for scheduling;synchronizing the plurality of processor cores;processing a scheduling event for the first address space; andassigning the first address space to a processor core for the scheduling event. 24. A system for scheduling applications on a multi-core processor, comprising: a plurality of affinity groups each comprising two or more processor cores and a plurality of address spaces; anda scheduler configured for assigning one or more of the plurality of affinity groups to execute on associated cores of the multi-core processor, wherein the scheduler is further configured for:releasing a first processor core far scheduling;synchronizing the plurality of processor cores;processing a scheduling event for the first processor core; associating the first processor core with an affinity group associated with the scheduling event; andassigning a plurality of address spaces to the first processor core for the scheduling event. 25. The system of claim 24, wherein the scheduling event comprises task-core affinity for at least one task. 26. The system of claim 24, wherein at least one task-core affinity is designated to be Changeable at run-time. 27. The system of claim 24, wherein a task-core affinity is designated not to be changeable at run-time. 28. The system of claim 24, wherein the scheduler is further configured for synchronizing the first core with any of the plurality of processor cores associated with the scheduling event. 29. The system of claim 24, wherein the scheduler is further configured for synchronizing the first processor core with at east one of the processor cores associated with the affinity group associated with the scheduling event. 30. The system of claim 24, wherein the scheduler is further configured for selecting an affinity group for which all of the associated cores are available and none of the associated address spaces are currently running on another core. 31. The system of claim 24, wherein only applications associated with the address spaces assigned to an affinity group are eligible to be assigned to the processor cores assigned to the affinity group scheduled for execution. 32. The system of claim 24, wherein at least one of the plurality of affinity groups comprises at least one dependency group comprising a plurality of address spaces that share at least one resource. 33. The system of claim 32, wherein the scheduler is further configured for scheduling a plurality of address spaces associated with at least one dependency group. 34. The system of claim 32, wherein at least two of the plurality of affinity groups share a dependency group. 35. The system of claim 24, wherein the scheduler is further configured for activating one of a plurality of schedules for at least one of the associated cores. 36. The system of claim 24, wherein the scheduler is further configured for scheduling a task to run on a processor core according to a task-core affinity for the task. 37. The system of claim 24, wherein the scheduler is configured to schedule a task to run on a processor core according to a task-core affinity if the task has an affinity for a processor core associated with the affinity group scheduled for execution. 38. The system of claim 24, wherein the scheduler is configured not to schedule a task for execution with an affinity group if the task has an affinity for a processor core that is not associated with the affinity group. 39. The system of claim 24, wherein each of the affinity groups has no processor cores and no address spaces in common with any of the other of the plurality of affinity groups, to permit each of the plurality of affinity groups to be scheduled independently. 40. The system of claim 24, wherein the scheduler is further configured for scheduling a first affinity group and a second affinity group to execute simultaneously. 41. The system of claim 24, wherein the first plurality of address spaces comprises at least one address space in the second plurality of address spaces. 42. The system of claim 24, wherein the first at least one affinity group comprises at least one address space in the second at least one affinity group. 43. The system of claim 24, wherein the scheduler is further configured to propagate timing events of the first processor core to at most, the plurality of processor cores associated with the scheduling event. 44. The system of claim 24, wherein the scheduler is further configured for: releasing a first address space for scheduling; synchronizing the plurality of processor cores; processing a scheduling event for the first address space; and assigning the first address space to a processor core for the scheduling event.