Single-event transient feedback disturbance suppression system
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IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G05B-013/02
G05B-011/01
출원번호
US-0521258
(2014-10-22)
등록번호
US-9817371
(2017-11-14)
발명자
/ 주소
Dominguez, Jose
출원인 / 주소
HONEYWELL INTERNATIONAL INC.
대리인 / 주소
Lorenz & Kopf, LLP
인용정보
피인용 횟수 :
0인용 특허 :
9
초록▼
A system for suppressing disturbances in a single-event transient susceptible (SET) signal includes an addition function, a subtraction function, an upper slew limiter, a lower slew limiter, and a magnitude limiter. The addition function adds the first offset to the SET susceptible signal to thereby
A system for suppressing disturbances in a single-event transient susceptible (SET) signal includes an addition function, a subtraction function, an upper slew limiter, a lower slew limiter, and a magnitude limiter. The addition function adds the first offset to the SET susceptible signal to thereby generate an upper bound limit. The subtraction function subtracts the second offset from the SET susceptible signal to thereby generate a lower bound limit. The upper slew limiter limits the rate of change of the upper bound limit to thereby generate a rate limited upper bound limit. The lower slew limiter limits the rate of change of the lower bound limit to thereby generate a rate limited lower bound limit. The magnitude limiter prevents the magnitude of the SET susceptible signal from exceeding the magnitude of the rate limited upper bound limit and the magnitude of the rate limited lower bound limit.
대표청구항▼
1. A system for suppressing disturbances in a single-event transient susceptible (SET) signal, the system comprising: an addition circuit adapted to receive the SET susceptible signal and a first offset and configured, upon receipt thereof, to add the first offset to the SET susceptible signal to th
1. A system for suppressing disturbances in a single-event transient susceptible (SET) signal, the system comprising: an addition circuit adapted to receive the SET susceptible signal and a first offset and configured, upon receipt thereof, to add the first offset to the SET susceptible signal to thereby generate an upper bound limit;a subtraction circuit adapted to receive the SET susceptible signal and a second offset and configured, upon receipt thereof, to subtract the second offset from the SET susceptible signal to thereby generate a lower bound limit;an upper slew limiter circuit coupled to receive the upper bound limit and configured, upon receipt thereof, to limit a rate of change of the upper bound limit to thereby generate a rate limited upper bound limit;a lower slew limiter circuit coupled to receive the lower bound limit and configured, upon receipt thereof, to limit a rate of change of the lower bound limit to thereby generate a rate limited lower bound limit; anda magnitude limiter circuit coupled to receive the rate limited upper bound limit, the rate limited lower bound limit, and the SET susceptible signal, each of the rate limited upper bound limit, the rate limited lower bound limit, and the SET susceptible signal having a magnitude, the magnitude limiter circuit configured, upon receipt of the rate limited upper bound limit, the rate limited lower bound limit, and the SET susceptible signal, to prevent the magnitude of the SET susceptible signal from exceeding the magnitude of the rate limited upper bound limit and the magnitude of the rate limited lower bound limit. 2. The system of claim 1, wherein: the first offset is a first predetermined fixed offset value; andthe second offset is a second predetermined fixed offset value. 3. The system of claim 1, wherein: the first offset is a first variable offset value; andthe second offset is a second variable offset value. 4. The system of claim 3, further comprising: a first variable signal source configured to supply the first offset; anda second signal source configured to supply the second offset. 5. The system of claim 4, wherein the first variable signal source comprises: a first absolute value circuit coupled to receive a first variable signal and configured, upon receipt thereof, to supply a first signal having a magnitude representative of an absolute value of the first variable signal; anda first amplifier circuit coupled to receive the first signal and configured, upon receipt thereof, to amplify the first signal and supply an amplified first signal. 6. The system of claim 5, wherein the second variable signal source comprises: a second absolute value circuit coupled to receive a second variable signal and configured, upon receipt thereof, to supply a second signal having a magnitude representative of an absolute value of the second variable signal; anda second amplifier circuit coupled to receive the second signal and configured, upon receipt thereof, to amplify the second signal and supply an amplified second signal. 7. A closed-loop feedback control system, comprising: a control signal source configured to supply a control signal, the control signal susceptible to a single-event transient (SET); anda SET disturbance suppression system coupled to receive the control signal from the control signal source and configured, upon receipt thereof, to suppress a disturbance caused by a SET, the SET disturbance suppression system comprising: an addition circuit coupled to receive the control signal and a first offset and configured, upon receipt thereof, to add the first offset to the control signal to thereby generate an upper bound limit;a subtraction circuit coupled to receive the control signal and a second offset and configured, upon receipt thereof, to subtract the second offset from the control signal to thereby generate a lower bound limit;an upper slew limiter circuit coupled to receive the upper bound limit and configured, upon receipt thereof, to limit a rate of change of the upper bound limit to thereby generate a rate limited upper bound limit;a lower slew limiter circuit coupled to receive the lower bound limit and configured, upon receipt thereof, to limit a rate of change of the lower bound limit to thereby generate a rate limited lower bound limit; anda magnitude limiter circuit coupled to receive the rate limited upper bound limit, the rate limited lower bound limit, and the control signal, each of the rate limited upper bound limit, the rate limited lower bound limit, and the control signal having a magnitude, the magnitude limiter circuit configured, upon receipt of the rate limited upper bound limit, the rate limited lower bound limit, and the control signal, to prevent the magnitude of the control signal from exceeding the magnitude of the rate limited upper bound limit and the magnitude of the rate limited lower bound limit. 8. The system of claim 7, wherein: the first offset is a first predetermined fixed offset value; andthe second offset is a second predetermined fixed offset value. 9. The system of claim 7, wherein: the first offset is a first variable offset value; andthe second offset is a second variable offset value. 10. The system of claim 9, further comprising: a first variable signal source configured to supply the first offset; anda second signal source configured to supply the second offset. 11. The system of claim 10, wherein the first variable signal source comprises: a first absolute value circuit coupled to receive the first variable signal and configured, upon receipt thereof, to supply a first signal having a magnitude representative of an absolute value of the first variable signal; anda first amplifier circuit coupled to receive the first signal and configured, upon receipt thereof, to amplify the first signal and supply an amplified first signal. 12. The system of claim 11, wherein the second variable signal source comprises: a second absolute value circuit coupled to receive the second variable signal and configured, upon receipt thereof, to supply a second signal having a magnitude representative of an absolute value of the second variable signal; anda second amplifier circuit coupled to receive the second signal and configured, upon receipt thereof, to amplify the second signal and supply an amplified second signal. 13. The system of claim 7, wherein: the closed-loop feedback control system includes a feedback signal path that supplies a feedback control signal; andthe control signal is the feedback control signal. 14. The system of claim 7, wherein: the closed-loop feedback control system includes an error signal path that supplies an error control signal; andthe control signal is the error control signal. 15. A closed-loop feedback control system for controlling a device, comprising: an error circuit coupled to receive a device command and a feedback control signal representative of a response of the component, the error circuit configured, upon receipt of the component command and the feedback control signal, to supply an error control signal representative of a difference between the device command and the feedback control signal; anda single-event transient (SET) disturbance suppression system coupled to receive the error control signal and configured, upon receipt thereof, to suppress a disturbance caused by a SET, the SET disturbance suppression system comprising: an addition circuit coupled to receive the error control signal and a first offset and configured, upon receipt thereof, to add the first offset to the error control signal to thereby generate an upper bound limit;a subtraction circuit coupled to receive the error control signal and a second offset and configured, upon receipt thereof, to subtract the second offset from the error control signal to thereby generate a lower bound limit;an upper slew limiter circuit coupled to receive the upper bound limit and configured, upon receipt thereof, to limit a rate of change of the upper bound limit to thereby generate a rate limited upper bound limit;a lower slew limiter circuit coupled to receive the lower bound limit and configured, upon receipt thereof, to limit a rate of change of the lower bound limit to thereby generate a rate limited lower bound limit; anda magnitude limiter circuit coupled to receive the rate limited upper bound limit, the rate limited lower bound limit, and the error control signal, each of the rate limited upper bound limit, the rate limited lower bound limit, and the error control signal having a magnitude, the magnitude limiter circuit configured, upon receipt of the rate limited upper bound limit, the rate limited lower bound limit, and the error control signal, to prevent the magnitude of the error control signal from exceeding the magnitude of the rate limited upper bound limit and the magnitude of the rate limited lower bound limit. 16. The system of claim 15, wherein: the first offset is a first predetermined fixed offset value; andthe second offset is a second predetermined fixed offset value. 17. The system of claim 15, wherein: the first offset is a first variable offset value; andthe second offset is a second variable offset value. 18. A closed-loop feedback control system for controlling a device, comprising: an error circuit coupled to receive a device command and a feedback control signal representative of a response of the device, the error circuit configured, upon receipt of the device command and the feedback control signal, to supply an error control signal representative of a difference between the device command and the feedback control signal; anda single-event transient (SET) disturbance suppression system coupled to receive the feedback control signal and configured, upon receipt thereof, to suppress a disturbance caused by a SET and supply the feedback control signal to the error circuit, the SET disturbance suppression system comprising: an addition circuit coupled to receive the feedback control signal and a first offset and configured, upon receipt thereof, to add the first offset to the feedback control signal to thereby generate an upper bound limit;a subtraction circuit coupled to receive the feedback control signal and a second offset and configured, upon receipt thereof, to subtract the second offset from the feedback control signal to thereby generate a lower bound limit;an upper slew limiter circuit coupled to receive the upper bound limit and configured, upon receipt thereof, to limit a rate of change of the upper bound limit to thereby generate a rate limited upper bound limit;a lower slew limiter circuit coupled to receive the lower bound limit and configured, upon receipt thereof, to limit a rate of change of the lower bound limit to thereby generate a rate limited lower bound limit; anda magnitude limiter circuit coupled to receive the rate limited upper bound limit, the rate limited lower bound limit, and the feedback control signal, each of the rate limited upper bound limit, the rate limited lower bound limit, and the feedback control signal having a magnitude, the magnitude limiter circuit configured, upon receipt of the rate limited upper bound limit, the rate limited lower bound limit, and the feedback control signal, to prevent the magnitude of the feedback control signal from exceeding the magnitude of the rate limited upper bound limit and the magnitude of the rate limited lower bound limit. 19. The system of claim 18, wherein: the first offset is a first predetermined fixed offset value; andthe second offset is a second predetermined fixed offset value. 20. The system of claim 18, wherein: the first offset is a first variable offset value; andthe second offset is a second variable offset value.
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