초록 ▼

Provided herein are apparatus and methods for high linearity voltage variable attenuators (VVAs). In certain configurations, a high linearity VVA includes multiple shunt arms or circuits that operate in parallel with one another between a signal node and a first DC voltage, such as ground. Thus, the

Provided herein are apparatus and methods for high linearity voltage variable attenuators (VVAs). In certain configurations, a high linearity VVA includes multiple shunt arms or circuits that operate in parallel with one another between a signal node and a first DC voltage, such as ground. Thus, the shunt arms are in shunt with respect to a signal path of the VVA. The multiple shunt arms include a first shunt arm of one or more n-type field effect transistor (NFETs) and a second shunt arm of one or more p-type field effect transistor (PFETs). The gates of the NFETs are controlled using a control voltage, and the gates of the PFETs are controlled using a complementary control voltage that changes inversely with respect to the control voltage.

대표청구항 ▼

1. A radio frequency (RF) system having controllable attenuation, the RF system comprising: a voltage variable attenuator (VVA) comprising: an input terminal;an output terminal;a control circuit configured to control an amount of attenuation along a signal path through the VVA between the input term

1. A radio frequency (RF) system having controllable attenuation, the RF system comprising: a voltage variable attenuator (VVA) comprising: an input terminal;an output terminal;a control circuit configured to control an amount of attenuation along a signal path through the VVA between the input terminal and the output terminal, wherein the control circuit is configured to generate a first control voltage and a first complementary control voltage that changes inversely with respect to the first control voltage;a first shunt circuit electrically connected in shunt to the signal path, wherein the first shunt circuit comprises at least one n-type field effect transistor (NFET) having a gate biased by the first control voltage, wherein the at least one NFET of the first shunt circuit comprises two or more NFETs electrically connected in series between a node of the signal path and a first DC voltage; anda second shunt circuit electrically connected in shunt to the signal path, wherein the second shunt circuit comprises at least one p-type field effect transistor (PFET) having a gate biased by the first complementary control voltage. 2. The RF system of claim 1, wherein the at least one PFET of the second shunt circuit comprises two or more PFETs electrically connected in series between the node of the signal path and the first DC voltage. 3. The RF system of claim 1, wherein the control circuit is configured to generate the first complementary control voltage to have a voltage level about equal to a difference between a DC voltage and the first control voltage. 4. The RF system of claim 1, wherein the at least one NFET has a channel biased by a first DC voltage, wherein the VVA further includes a plurality of DC blocking capacitors configured to provide DC blocking to the second shunt circuit, wherein the at least one PFET has a channel biased by a second DC voltage different than the first DC voltage. 5. The VVA of claim 1, wherein the control voltage and the complementary control voltage comprise analog signals. 6. The RF system of claim 1, wherein the first shunt circuit provides a first impedance to the signal path and the second shunt circuit provides a second impedance to the signal path, wherein the first impedance and the second impedance operate in parallel to provide a combined impedance, wherein a change in amplitude of an RF signal received at the input terminal induces an impedance variation in the combined impedance that is less than an induced impedance variation of the first impedance and less than an induced impedance variation of the second impedance. 7. The RF system of claim 6, wherein the at least one PFET comprises two or more PFETs electrically connected in series, wherein the first impedance is based on a sum of two or more channel resistances of the two or more NFETs, and wherein the second impedance is based on a sum of two or more channel resistances of the two or more PFETs. 8. The RF system of claim 1, wherein the control circuit is configured to receive an analog attenuation control signal, wherein the control circuit is configured to generate the first control voltage and the first complementary control voltage based on the analog attenuation control signal. 9. The RF system of claim 8, wherein one of the first control voltage or the first complementary control voltage varies substantially proportionate to the analog attenuation control signal, and wherein the other of the first control voltage or the first complementary control voltage varies substantially inversely proportionate to the analog attenuation control signal. 10. The RF system of claim 8, wherein the control circuit comprises a plurality of amplifiers configured to generate the first control voltage and the first complementary control voltage based on the analog attenuation control signal. 11. The RF system of claim 8, further comprising a power amplifier and a feedback loop configured to generate the analog attenuation control signal based on an output power of the power amplifier. 12. A radio frequency (RF) system having controllable attenuation, the RF system comprising: a voltage variable attenuator (VVA) comprising: an input terminal;an output terminal;a control circuit configured to control an amount of attenuation along a signal path through the VVA between the input terminal and the output terminal, wherein the control circuit is configured to generate a first control voltage and a first complementary control voltage that changes inversely with respect to the first control voltage;a first shunt circuit electrically connected in shunt to the signal path, wherein the first shunt circuit comprises at least one n-type field effect transistor (NFET) having a gate biased by the first control voltage; anda second shunt circuit electrically connected in shunt to the signal path, wherein the second shunt circuit comprises at least one p-type field effect transistor (PFET) having a gate biased by the first complementary control voltage;wherein the VVA further comprises an inductor in the signal path, wherein the inductor is electrically connected between a first signal node of the signal path and a second signal node of the signal path, wherein the first and second shunt circuits are electrically connected to the first signal node. 13. The RF system of claim 12, wherein the control circuit is further configured to generate a second control voltage and a second complementary control voltage that changes inversely with respect to the second control voltage, wherein the VVA further comprises a third shunt circuit electrically connected to the second signal node and biased by the second control voltage, and wherein the VVA further comprises a fourth shunt circuit electrically connected to the second signal node and biased by the second complementary control voltage. 14. The VVA of claim 12, wherein the control voltage and the complementary control voltage comprise analog signals. 15. A voltage variable attenuator (VVA) for radio frequency signals comprising: a control circuit configured to control an amount of attenuation of the VVA, wherein the control circuit is configured to generate a control voltage and a complementary control voltage that changes inversely with respect to the control voltage; anda shunt attenuation circuit comprising: a first shunt circuit electrically connected between a signal node and a first DC voltage, wherein the first shunt circuit comprises at least one n-type field effect transistor of a first type having a gate biased by the control voltage;a first DC blocking capacitor electrically connected between the signal node and a first internal node;a second shunt circuit electrically connected between the first internal node and a second internal node, wherein the second shunt circuit comprises at least one field effect transistor of a second type opposite to the first type having a gate biased by the complementary control voltage; anda second DC blocking capacitor electrically connected between the second internal node and the first DC voltage. 16. The VVA of claim 15, wherein the at least one field effect transistor of the first type of the first shunt circuit comprises two or more n-type field effect transistors electrically connected in series, and wherein the at least one field effect transistor of the second type of the second shunt circuit comprises two or more p-type field effect transistors electrically connected in series. 17. The VVA of claim 15, wherein the control voltage and the complementary control voltage comprise analog signals. 18. The VVA of claim 15, wherein the control circuit is configured to control the amount of attenuation along a signal path through the VVA, wherein the VVA further comprises an inductor in the signal path. 19. The VVA of claim 15, wherein the shunt attenuation circuit further comprises a DC bias circuit configured to bias the first internal node and the second internal node with a second DC voltage. 20. The VVA of claim 19, wherein the control circuit is configured to receive an analog attenuation control signal, wherein the control circuit is configured to generate the control voltage and the complementary control voltage based on the analog attenuation control signal, and wherein the control circuit is configured to generate the complementary control voltage to have a voltage level about equal to a difference between the second DC voltage and the control voltage.