최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
DataON 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Edison 바로가기다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
Kafe 바로가기국가/구분 | United States(US) Patent 등록 |
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국제특허분류(IPC7판) |
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출원번호 | US-0285176 (2016-10-04) |
등록번호 | US-9934942 (2018-04-03) |
발명자 / 주소 |
|
출원인 / 주소 |
|
대리인 / 주소 |
|
인용정보 | 피인용 횟수 : 13 인용 특허 : 775 |
Described processing chambers may include a chamber housing at least partially defining an interior region of a semiconductor processing chamber. The chamber may include a showerhead positioned within the chamber housing, and the showerhead may at least partially divide the interior region into a re
Described processing chambers may include a chamber housing at least partially defining an interior region of a semiconductor processing chamber. The chamber may include a showerhead positioned within the chamber housing, and the showerhead may at least partially divide the interior region into a remote region and a processing region in which a substrate can be contained. The chamber may also include an inductively coupled plasma source positioned between the showerhead and the processing region. The inductively coupled plasma source may include a conductive material within a dielectric material.
1. A semiconductor processing chamber comprising: a chamber housing at least partially defining an interior region of the semiconductor processing chamber;a showerhead positioned within the chamber housing, wherein the showerhead at least partially divides the interior region into a remote region an
1. A semiconductor processing chamber comprising: a chamber housing at least partially defining an interior region of the semiconductor processing chamber;a showerhead positioned within the chamber housing, wherein the showerhead at least partially divides the interior region into a remote region and a processing region in which a substrate can be contained; andan inductively coupled plasma source positioned between the showerhead and the processing region, wherein the inductively coupled plasma source comprises a conductive material within a dielectric material. 2. The semiconductor processing chamber of claim 1, wherein the dielectric material is selected from the group consisting of aluminum oxide, yttrium oxide, single crystalline silicon, and quartz. 3. The semiconductor processing chamber of claim 1, wherein the conductive material comprises a copper tube configured to receive a fluid flowed within the tube. 4. The semiconductor processing chamber of claim 1, wherein the dielectric material defines apertures through the inductively coupled plasma source, and wherein the conductive material is positioned about the apertures within the dielectric material. 5. The semiconductor processing chamber of claim 1, wherein the apertures are included in a uniform pattern across the dielectric material and about the conductive material. 6. The semiconductor processing chamber of claim 1, wherein the conductive material is configured in a planar spiral pattern within the dielectric material. 7. The semiconductor processing chamber of claim 1, wherein the conductive material is configured in a coil extending vertically within the dielectric material for at least two complete turns of the conductive material. 8. The semiconductor processing chamber of claim 1, wherein the conductive material comprises two conductive tubes positioned within the inductively coupled source. 9. The semiconductor processing chamber of claim 8, wherein a first tube is included in a first configuration within the inductively coupled source, wherein a second tube is included in a second configuration within the inductively coupled source, and wherein the second configuration is radially inward of the first configuration. 10. The semiconductor processing chamber of claim 9, wherein the first configuration and the second configuration are each coiled configurations extending vertically within the dielectric material. 11. The semiconductor processing chamber of claim 9, wherein the first configuration and the second configuration are each a planar configuration within the same plane of the inductively coupled source. 12. The semiconductor processing chamber of claim 9, wherein the first tube and the second tube are coupled with an RF source. 13. The semiconductor processing chamber of claim 12, wherein the first tube and the second tube are each coupled with the RF source through a capacitive divider. 14. The semiconductor processing chamber of claim 1, wherein the inductively coupled source comprises at least two plates coupled together, wherein each plate defines at least a portion of a channel, and wherein the conductive material is housed within the channel at least partially defined by each of the at least two plates. 15. An inductively coupled plasma source comprising: a first plate defining at least a portion of a first channel and at least a portion of a second channel within the first plate, wherein the first plate comprises a dielectric material;a first conductive material seated within the at least a portion of the first channel; anda second conductive material seated within the at least a portion of the second channel, wherein each of the first conductive material and the second conductive material is characterized by a spiral or coil configuration, and wherein each of the first conductive material and the second conductive material is coupled with an RF source. 16. The inductively coupled plasma source of claim 15, wherein the first plate defines apertures through the first plate, and wherein a central axis of each aperture is normal to the at least a portion of the channel. 17. The inductively coupled plasma source of claim 15, wherein the source comprises a thickness of at least three inches. 18. The inductively coupled plasma source of claim 15, further comprising a second plate coupled with the first plate enclosing the conductive material between the first plate and the second plate, wherein the second plate defines second apertures axially aligned with the apertures defined through the first plate. 19. A semiconductor processing chamber comprising: a chamber housing at least partially defining an interior region of the semiconductor processing chamber, wherein the chamber housing includes a lid assembly including an inlet for receiving precursors into the semiconductor processing chamber;a pedestal within the interior region of the semiconductor processing chamber;a showerhead positioned within the chamber housing, wherein the showerhead is positioned between the lid assembly and the pedestal;an inductively coupled plasma source positioned between the showerhead and the pedestal, wherein the inductively coupled plasma source comprises a conductive material within a dielectric material.
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