초록 ▼

Control ICs for controlling IGBTs include overheat detection comparators that determine an overheated state of the case, in addition to overheat detection comparators that determine an overheated state of chips of the IGBTs. Outputs of the overheat detection comparators are input into an AND circuit

Control ICs for controlling IGBTs include overheat detection comparators that determine an overheated state of the case, in addition to overheat detection comparators that determine an overheated state of chips of the IGBTs. Outputs of the overheat detection comparators are input into an AND circuit, and when all of the overheat detection comparators determine the overheated state of the case, the AND circuit outputs a protection operation signal of high level, and an alarm output circuit outputs an alarm signal. The overheated state of the chips and the overheated state of the case are detected on the basis of chip temperatures measured by temperature detection diodes which are provided with the IGBTs respectively, and therefore a temperature detection IC for case overheat protection is unnecessary, and detection accuracy of the case overheat improves.

대표청구항 ▼

1. A semiconductor module comprising: a plurality of switching elements provided with respective temperature detection elements for chip temperature detection, a plurality of diodes for protecting the switching elements, and a plurality of control circuits for controlling the switching elements, in

1. A semiconductor module comprising: a plurality of switching elements provided with respective temperature detection elements for chip temperature detection, a plurality of diodes for protecting the switching elements, and a plurality of control circuits for controlling the switching elements, in one package,wherein the control circuits include respective comparators that compare temperatures detected by the temperature detection elements with a predetermined reference temperature for a case,at least a first control circuit and a second control circuit among the control circuits includes a logical AND circuit,the logical AND circuits of the first and second control circuit are connected to outputs of the respective comparators to receive as inputs to the logical AND circuits only the outputs of the respective comparators, andthe logical AND circuit of the second control circuit receives outputs of at least two of the comparators, including the first comparator, and determines case overheat based on the outputs of the at least two comparators. 2. The semiconductor module according to claim 1, wherein the switching elements are located in upper arm units and lower arm units of first to third arm units of a multi-phase power device in order to form an inverter circuit. 3. The semiconductor module according to claim 2, wherein the logical AND circuit receives outputs of lower-arm comparators of three control circuits for controlling the switching elements located in the lower arm units, among the comparators. 4. The semiconductor module according to claim 3, wherein the logical AND circuit additionally receives at least one of outputs of upper-arm comparators of the control circuits for controlling the switching elements located in the upper arm units, among the comparators. 5. The semiconductor module according to claim 2, wherein the logical AND circuit receives outputs of upper-arm comparators of three control circuits for controlling the switching elements located in the upper arm units, among the comparators. 6. The semiconductor module according to claim 5, wherein the logical AND circuit additionally receives at least one of outputs of lower-arm comparators of the control circuits for controlling the switching elements located in the lower arm units, among the comparators. 7. The semiconductor module according to claim 2, wherein the logical AND circuit receives outputs of upper-arm comparators of two control circuits for controlling the switching elements located in any two of the upper arm units, and outputs of lower-arm comparators of two control circuits for controlling the switching elements located in any two of the lower arm units, among the comparators. 8. The semiconductor module according to claim 2, wherein the logical AND circuit includesa first logical AND circuit that receives outputs of first-arm comparators of two control circuits for controlling the switching elements located in an upper arm unit and a lower arm unit of a first arm unit, among the comparators,a second logical AND circuit that receives outputs of second-arm comparators of two control circuits for controlling the switching elements located in an upper arm unit and a lower arm unit of a second arm unit, among the comparators,a third logical AND circuit that receives outputs of third-arm comparators of two control circuits for controlling the switching elements located in an upper arm unit and a lower arm unit of a third arm unit, among the comparators, anda fourth logical AND circuit that receives outputs of the first logical AND circuit, the second logical AND circuit, and the third logical AND circuit. 9. The semiconductor module according to claim 8, further comprising a logical OR circuit that receives the outputs of the first logical AND circuit, the second logical AND circuit, and the third logical AND circuit. 10. A semiconductor module comprising: a first switching element;a first temperature detection element to detect a temperature of a chip including the first switching element;a first control circuit for controlling a switching operation of the first switching element, the first control circuit including a first comparator to compare a voltage corresponding to a temperature of the first temperature detection element with a threshold voltage;a second switching element;a second temperature detection element to detect a temperature of a chip including the second switching element;a second control circuit for controlling a switching operation of the second switching element, the second control circuit including a second comparator to compare a voltage corresponding to a temperature of the second temperature detection element with the threshold voltage,wherein the semiconductor module includes a plurality of control circuits, including the first and second control circuits, and a plurality of comparators, including the first and second comparators,wherein the first control circuit includes a first logic circuit,wherein the second control circuit includes a second logic circuit,wherein the first and second logic circuits are connected to the plurality of comparators to receive as inputs only outputs of the plurality of comparators,wherein the second logic circuit is connected to the first and second comparators to receive outputs of the first and second comparators as inputs to the second logic circuit, andwherein the second logic circuit generates at an overheat signal based on outputs of each of the first comparator and the second comparator. 11. The semiconductor module of claim 10, further comprising third and fourth switching elements, third and fourth temperature detection elements to detect temperatures of the chip including the third and fourth switching element, and third and fourth control circuits, among the plurality of control circuits, for controlling switching operations of the third and fourth switching elements, wherein the third and fourth control circuits include third and fourth comparators, among the plurality of comparators, to compare voltages corresponding to temperatures of the third and fourth temperature detection elements with the threshold voltage,wherein the first and third switching elements are located in upper arms of a multi-phase power device,wherein the second and fourth switching elements are located in lower arms of a multi-phase power device. 12. The semiconductor module of claim 11, wherein the third control circuit includes a third logic circuit,wherein an output of the fourth comparator is connected to an input of the third logic circuit, andwherein an output of the third logic circuit is connected to an input of the second logic circuit. 13. The semiconductor module of claim 12, wherein the first logic circuit is an AND circuit configured to perform a logical AND operation on the output of the first comparator, the second comparator, and the third logic circuit. 14. The semiconductor module of claim 10further comprising third and fourth switching elements, third and fourth temperature detection elements to detect temperatures of the chip including the third and fourth switching element, and third and fourth control circuits, among the plurality of control circuits, for controlling switching operations of the third and fourth switching elements,wherein the third and fourth control circuits include third and fourth comparators, among the plurality of comparators, to compare voltages corresponding to temperatures of the third and fourth temperature detection elements with the threshold voltage,wherein the first and second switching elements are located in upper arms of a multi-phase power device,wherein the third and fourth switching elements are located in lower arms of the multi-phase power device,wherein an output of the fourth comparator is connected to an input of the second logic circuit, andwherein each of the second logic circuit and the third logic circuit output separate overheat signals corresponding to the upper arm and the lower arm, respectively. 15. The semiconductor module of claim 11, wherein the second logic circuit includes a first AND gate for performing a logical AND operation on at least two outputs from the first, second, third, and fourth comparators, wherein the logic circuit includes an OR gate connected to an output of the first AND gate and at least two outputs from the first, second, third, and fourth comparators for performing a logical OR operation on at least two outputs from the first AND gate and the first, second, third, and fourth comparators, anda second AND gate connected to an output of the first AND gate and the at least two outputs from the first, second, third, and fourth comparators for performing a logical AND operation on the at least two outputs from the first AND gate and the first, second, third, and fourth comparators.