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Pulsed level shift and inverter circuits for GaN devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H02M-003/158
  • H02J-007/00
  • H02M-001/088
  • H03K-003/012
  • H01L-029/20
  • H03K-017/10
  • H03K-019/0185
  • H01L-025/07
  • H02M-003/157
  • H03K-003/356
  • H01L-027/088
  • H01L-023/528
  • H01L-029/10
  • H01L-029/40
  • H01L-029/417
  • H02M-001/00
  • H02M-003/155
출원번호 US-0219248 (2016-07-25)
등록번호 US-10135275 (2018-11-20)
발명자 / 주소
  • Kinzer, Daniel M.
  • Sharma, Santosh
  • Zhang, Ju Jason
출원인 / 주소
  • NAVITAS SEMICONDUCTOR INC.
대리인 / 주소
    Kilpatrick Townsend & Stockton
인용정보 피인용 횟수 : 0  인용 특허 : 53

초록 ▼

GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Va

대표청구항 ▼

1. A level shift circuit, comprising: a first inverter circuit comprising: a first input terminal;a first output terminal;a first GaN-based transistor having a gate coupled to the first input terminal, a drain coupled to the first output terminal, and a source coupled to a ground; anda first pull up

이 특허에 인용된 특허 (53)

  1. Ribarich, Tom; Zhang, Jason, Boost converter with zero voltage switching.
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  2. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Bootstrap capacitor charging circuit for GaN devices.
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  3. Bedell, Stephen W.; Hekmatshoartabari, Bahman; Sadana, Devendra K.; Shahidi, Ghavam G.; Shahrjerdi, Davood, Breakdown voltage multiplying integration scheme.
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  4. Noble Wendell P. ; Forbes Leonard, Circuits and method for body contacted and backgated transistors.
    상세보기
  5. Cao, Yiqun; Rupp, Andreas; Glaser, Ulrich, Combined ESD active clamp for cascaded voltage pins.
    상세보기
  6. Rozman,Allen F., Control circuit for a depletion mode switch and method of operating the same.
    상세보기
  7. Osame, Mitsuaki; Ueno, Tatsuro, Data latch circuit, driving method of the data latch circuit, and display device.
    상세보기
  8. Li, Jason Yuxin; Wohlmuth, Walter A.; Muthukrishnan, Swaminathan; Iversen, Christian Rye; Peachey, Nathaniel, Depletion-mode field effect transistor based electrostatic discharge protection circuit.
    상세보기
  9. Barsanti Andrea (Pisa ITX) Diazzi Claudio (Milan ITX) Vio Fabio (Milan ITX), Device for generating a reference voltage for a switching circuit including a capacitive bootstrap circuit.
    상세보기
  10. Kelly, David W., Differential high voltage level shifter.
    상세보기
  11. Leman Brooks R. (Santa Clara CA) Balakrishnan Balu (Saratoga CA), Dual threshold differential discriminator.
    상세보기
  12. Antonino Schillaci IT; Antonio Grimaldi IT; Giuseppe Ferla IT, Edge termination of semiconductor devices for high voltages with resistive voltage divider.
    상세보기
  13. Ping, Andrew T.; Ogbonnah, Dominic J., Electrostatic discharge protection circuit for compound semiconductor devices and circuits.
    상세보기
  14. Lidow, Alexander; Beach, Robert; Nakata, Alana; Cao, Jianjun; Zhao, Guang Yuan; Strittmatter, Robert; Liu, Fang Chang, Enhancement mode GaN HEMT device with gate spacer and method for fabricating the same.
    상세보기
  15. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, GaN circuit drivers for GaN circuit loads.
    상세보기
  16. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Half bridge driver circuits.
    상세보기
  17. Kinzer, Daniel Marvin; Sharma, Santosh; Zhang, Ju, Half bridge driver circuits.
    상세보기
  18. Kinzer, Daniel Marvin; Sharma, Santosh; Zhang, Ju; Giandalia, Marco; Ribarich, Thomas, Half bridge driver circuits.
    상세보기
  19. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Half bridge power conversion circuits using GaN devices.
    상세보기
  20. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Half bridge power conversion circuits using GaN devices.
    상세보기
  21. Liu Rui ; Gu Wen-Jian, Half-bridge zero-voltage-switched PWM flyback DC/DC converter.
    상세보기
  22. Wendt, Michael; Thoma, Lenz; Wicht, Bernhard, High side/low side driver device for switching electrical loads.
    상세보기
  23. Lien Chuen-Der ; Tien Ta-Ke, High speed buffer circuit with improved noise immunity.
    상세보기
  24. Newlin, Trevor M., High speed tri-level input power converter gate driver.
    상세보기
  25. Bahramian, Tony, Highly efficient III-nitride power conversion circuit.
    상세보기
  26. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Integrated level shifter.
    상세보기
  27. Kinzer, Daniel Marvin; Sharma, Santosh; Zhang, Ju, Integrated level shifter.
    상세보기
  28. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Level shift and inverter circuits for GaN devices.
    상세보기
  29. Kihara, Seiichiro, Level shift circuit.
    상세보기
  30. Li Yushan ; Stephen L. Wong, Low cost half bridge driver integrated circuit with capability of using high threshold voltage DMOS.
    상세보기
  31. Wood Peter N. (Rolling Hills Est. CA), MOS gate driver for ballast circuits.
    상세보기
  32. Ueunten, Paul, Method and apparatus for high performance switch mode voltage regulators.
    상세보기
  33. Choi Chongwook Chris ; Tam David C., Method and circuit for driving power transistors in a half bridge configuration allowing for excessive negative swing of the output node and integrated circuit incorporating the circuit.
    상세보기
  34. Choi Chongwook C. (Redondo Beach CA) Tam David C. (Redondo Beach CA), Method and circuit for driving power transistors in a half bridge configuration from control signals referenced to any p.
    상세보기
  35. Tamura Hirotaka,JPX ; Takauchi Hideki,JPX ; Cheung Tsz-shing,JPX ; Gotoh Kohtaroh,JPX, Method of and apparatus for correctly transmitting signals at high speed without waveform distortion.
    상세보기
  36. Rupp, Andreas; Cao, Yiqun; Glaser, Ulrich, Noise-tolerant active clamp with ESD protection capability in power up mode.
    상세보기
  37. Gilliam Gary, On-chip substrate regular test mode.
    상세보기
  38. Smith,Mark; Qiao,Chongming; Condido,Vincent; Amironi,Reza; Asvadi,Amir, Over voltage protection scheme for synchronous buck converter.
    상세보기
  39. Ivanov Vadim V. ; Zhang Shilong ; Johnson Gregory H., Overload recovery circuit and method.
    상세보기
  40. Kim, Ho-jung; Shin, Jai-kwang; Chung, U-in; Choi, Hyun-sik, Power management chips and power management devices including the same.
    상세보기
  41. Kinzer, Daniel M.; Sammon, Tim; Pavier, Mark; Amali, Adam I., Power mosfet with integrated drivers in a common package.
    상세보기
  42. Thomson Peter K. (Ralston Paisley GB6), Power switch for dual power supply circuit.
    상세보기
  43. Truong, Keith; Schadt, John; Lall, Ravi; Andrews, William, Programmable buffer.
    상세보기
  44. Kinzer, Daniel M.; Sharma, Santosh; Zhang, Ju Jason, Pulsed level shift and inverter circuits for GaN devices.
    상세보기
  45. Yamamoto, Masahiro, Semiconductor circuit.
    상세보기
  46. Weis, Rolf; Hirler, Franz; Feldtkeller, Martin; Deboy, Gerald; Stecher, Matthias; Willmeroth, Armin, Semiconductor device arrangement with a first semiconductor device and with a plurality of second semiconductor devices.
    상세보기
  47. Kohno, Kenji, Semiconductor device including a surge protecting circuit.
    상세보기
  48. Kitamoto, Ayako; Matsumiya, Masato; Eto, Satoshi; Takita, Masato; Nakamura, Toshikazu; Kanou, Hideki; Kawabata, Kuninori; Hasegawa, Masatomo; Koga, Toru; Ishii, Yuki, Semiconductor integrated circuit and method of switching source potential of transistor in semiconductor integrated circuit.
    상세보기
  49. Tanase, Hironobu; Ichimura, Isao, Semiconductor laser drive circuit.
    상세보기
  50. Zhang, Ju Jason, Soft switched single stage wireless power transfer.
    상세보기
  51. Ni, Liqin, Solid-state lighting apparatus and methods using switched energy storage.
    상세보기
  52. Forghani-Zadeh, Hassan Pooya; Huertas-Sanchez, Luis A., System and apparatus for driver circuit for protection of gates of GaN FETs.
    상세보기
  53. Tobita Youichi (Hyogo JPX) Kihara Yuji (Hyogo JPX), Test apparatus for static-type semiconductor memory devices.
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