Apparatus and methods for parallel testing of devices
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G01L-005/14
F41G-007/00
출원번호
US-0188497
(2016-06-21)
등록번호
US-10156426
(2018-12-18)
발명자
/ 주소
Halter, Mark
출원인 / 주소
The United States of America, as represented by the Secretary of the Navy
대리인 / 주소
Monsey, Christopher A.
인용정보
피인용 횟수 :
0인용 특허 :
10
초록▼
Test systems coupled to a device under test (DUT) with different segments or stages and related methods are provided. Exemplary test systems include logic that executes concurrent determinations or tests for multiple DUT segments or stages. Exemplary test systems can include logic that concurrently
Test systems coupled to a device under test (DUT) with different segments or stages and related methods are provided. Exemplary test systems include logic that executes concurrent determinations or tests for multiple DUT segments or stages. Exemplary test systems can include logic that concurrently executes various tests associated with different DUT segments including determinations or testing for a specified DUT test environment, determinations or tests of when data will be made available to various DUT segments, and various determinations or tests that may be completed before data is made available to specified DUT segments. At least one embodiment of a first stage concurrent determination test system determines first stage tests do not require a specified target and high pressure gas conditions for DUT testing and at least one embodiment of a second stage concurrent test system does require a specified target and high pressure gas conditions for DUT testing.
대표청구항▼
1. A test system comprising: a test missile;an electronic device operably coupled to the test missile and comprising: first stage concurrent determination test logic configured to: determine that a plurality of first stage tests to be executed on the test missile do not require a missile target or h
1. A test system comprising: a test missile;an electronic device operably coupled to the test missile and comprising: first stage concurrent determination test logic configured to: determine that a plurality of first stage tests to be executed on the test missile do not require a missile target or high pressure gas for testing of the test missile;concurrently execute the plurality of first stage tests on the test missile by determining when data will be made available for each of the plurality of first stage tests and executing a portion of the plurality of first stage tests that may be completed before the data is made available for each of the plurality of first stage tests; andprovide an indication of whether the plurality of first stage tests completed successfully;second stage concurrent determination test logic configured to: determine that a plurality of second stage tests to be executed on the test missile require a first type missile target and high pressure gas for testing of the test missile;concurrently execute the plurality of second stage tests on the test missile by determining when data will be made available for each of the plurality of second stage tests and executing a portion of the plurality of second stage tests that may be completed before the data is made available for each of the plurality of second stage tests; andprovide an indication of whether the plurality of second stage tests completed successfully; andthird stage concurrent determination test logic configured to: determine that a plurality of third stage tests to be executed on the test missile require a second type missile target for testing of the test missile;concurrently execute the plurality of third stage tests on the test missile by determining when data will be made available for each of the plurality of third stage tests and executing a portion of the plurality of third stage tests that may be completed before the data is made available for each of the plurality of third stage tests; andprovide an indication of whether the plurality of third stage tests completed successfully. 2. The test system of claim 1 wherein the electronic device comprises gyro spin test logic for executing a gyro spin test, wherein the plurality of first stage tests comprise the gyro spin test, wherein the gyro spin test logic is operable to: provide the test missile with a first test signal;determine a gyro spin frequency of a gyro of the test missile based on a first received signal from the test missile after a first minimum threshold amount of time;determine a gyro spin time of the gyro of the test missile based on the first received signal from the test missile; anddetermine whether the determined gyro spin frequency is within a gyro spin frequency range and whether the determined gyro spin time falls within a gyro spin time range, wherein: if the determined gyro spin frequency is within the gyro spin frequency range and the determined gyro spin time is within the gyro spin time range, the gyro spin test logic provides an indication that the gyro spin test completed successfully; andif the determined gyro spin frequency is not within the gyro spin frequency range or the determined gyro spin time is not within the gyro spin time range, the gyro spin test logic provides an indication that the gyro spin test has failed. 3. The test system of claim 2 wherein the electronic device comprises gyro spin frequency test logic for executing a gyro spin frequency test, wherein the plurality of first stage tests comprise the gyro spin frequency test, wherein the gyro spin frequency test logic is operable to: determine a gyro spin frequency of the gyro of the test missile based on a second received signal from the test missile after a second minimum threshold amount of time; anddetermine whether the determined gyro spin frequency is within a gyro spin frequency range, wherein: if the determined gyro spin frequency is within the gyro spin frequency range, the gyro spin frequency test logic provides an indication that the gyro spin frequency test completed successfully; andif the determined gyro spin frequency is not within the gyro spin frequency range, the gyro spin frequency test logic provides an indication that the gyro spin frequency test has failed. 4. The test system of claim 3 wherein the electronic device comprises gyro spin direction test logic for executing a gyro spin direction test, wherein the plurality of first stage tests comprise the gyro spin direction test, wherein the gyro spin direction test logic is operable to determine a gyro spin direction of the gyro of the test missile. 5. The test system of claim 1 wherein the electronic device comprises digital word sensing test logic for executing a digital word sensing test, wherein the plurality of first stage tests comprise the digital word sensing test, wherein the digital word sensing test logic is operable to: determine whether a digital word in signal occurred based on a first received signal from the test missile after a minimum threshold amount of time;determine whether a digital word out signal occurred based on a second received signal from the test missile after the minimum threshold amount of time; wherein: if the digital word in signal occurred and the digital word out signal occurred, the digital word sensing test logic provides an indication that the digital word sensing test completed successfully; andotherwise the digital word sensing test logic provides an indication that the digital word sensing test has failed. 6. The test system of claim 1 wherein the electronic device comprises chirp test logic for executing a chirp test, wherein the plurality of first stage tests comprise the chirp test, wherein the chirp test logic is operable to: periodically determine an audio out signal level based on a received audio out signal from the test missile over a period of time; anddetermine a number of times that the measured audio out signal level exceeds an audio out signal level threshold, wherein: if the determined number of times that the measured audio out signal level exceeds the audio out signal level threshold is greater than a maximum threshold, the audio out signal level test logic provides an indication that the audio out signal level test failed; andotherwise the audio out signal level test logic provides an indication that the audio out signal level test completed successfully. 7. The test system of claim 1 wherein the electronic device comprises operating current test logic for executing an operating current test, wherein the plurality of first stage tests comprise the operating current test, wherein the operating current test logic is operable to: determine an operating current based on a received signal from the test missile;determine whether the operating current is within an operating current range; anddetermine a number of how many of the plurality of first stage tests are completed, wherein: if the operating current is not within the operating current range or a determined number of the plurality of first stage tests are not completed, the operating current test logic provides an indication that the operating current test has failed; andif the operating current is within the operating current range and the determined number of the plurality of first stage tests are completed, the operating current test logic provides an indication that the operating current test completed successfully. 8. The test system of claim 1 wherein the electronic device comprises gas flow rate test logic for executing a gas flow rate test, wherein the plurality of second stage tests comprise the gas flow rate test, wherein the gas flow rate test logic is operable to: determine a gas flow rate based on one or more received signals from the test missile after a minimum threshold amount of time; anddetermine whether the gas flow rate is within a gas flow rate range, wherein: if the gas flow rate is within the gas flow rate range, the gas flow rate test logic provides an indication that the gas flow rate test completed successfully; andotherwise the gas flow rate test logic provides an indication that the gas flow rate test has failed. 9. The test system of claim 1 wherein the electronic device comprises functional cool down test logic for executing a functional cooldown test, wherein the plurality of second stage tests comprise the functional cooldown test, wherein the functional cooldown test logic is operable to determine whether the test missile acquires tracking of the first type missile target before a maximum threshold amount of time has expired based on a first received signal from the test missile, wherein: if the test missile acquires tracking of the first type missile target before the maximum threshold amount of time expires, the functional cooldown test logic provides an indication that the functional cooldown test completed successfully; andotherwise the functional cooldown test logic provides an indication that the functional cool down test has failed. 10. The test system of claim 9 wherein the electronic device comprises tracking sensitivity test logic for executing a tracking sensitivity test, wherein the plurality of second stage tests comprise the tracking sensitivity test, wherein the tracking sensitivity test logic is operable to determine whether the test missile maintains acquisition of the first type missile target for a minimum threshold amount of time based on a second received signal from the test missile, wherein: if the test missile maintains acquisition of the first type missile target for the minimum threshold amount of time, the tracking sensitivity test logic provides an indication that the tracking sensitivity test completed successfully; andotherwise the tracking sensitivity test logic provides an indication that the tracking sensitivity test has failed. 11. The test system of claim 1 wherein the electronic device comprises positive quiescent current test logic for executing a positive quiescent current test, wherein the plurality of third stage tests comprise the positive quiescent current test, wherein the positive quiescent current test logic is operable to determine a positive quiescent current level of the test missile while the test missile is tracking the second missile type target based on a received signal from the test missile, wherein: if the positive quiescent current level is within a positive quiescent current range, the positive quiescent current test logic provides an indication that the positive quiescent current test completed successfully; andotherwise the positive quiescent current test logic provides an indication that the positive quiescent current test has failed. 12. The test system of claim 1 wherein the electronic device comprises negative quiescent current test logic for executing a negative quiescent current test, wherein the plurality of third stage tests comprise the negative quiescent current test, wherein the negative quiescent current test logic is operable to determine a negative quiescent current level of the test missile while the test missile is tracking the second missile type target based on a received signal from the test missile, wherein: if the negative quiescent current level is within a negative quiescent current range, the negative quiescent current test logic provides an indication that the negative quiescent current test completed successfully; andotherwise the negative quiescent current test logic provides an indication that the negative quiescent current test has failed. 13. The test system of claim 1 wherein the electronic device comprises clockwise tracking capability test logic for executing a clockwise tracking capability test, wherein the plurality of third stage tests comprise the clockwise tracking capability test, wherein the clockwise tracking capability test logic is operable to determine whether the test missile maintains acquisition of the second type missile target for a minimum threshold amount of time based on a received signal from the test missile, wherein: if the test missile maintains acquisition of the second type missile target for the minimum threshold amount of time, the clockwise tracking capability test logic provides an indication that the clockwise tracking capability test completed successfully; andotherwise the clockwise tracking capability test logic provides an indication that the clockwise tracking capability test has failed. 14. The test system of claim 1 wherein the electronic device comprises caging capability test logic for executing a caging capability test, wherein the plurality of third stage tests comprise the caging capability test, wherein the caging capability test logic is operable to: provide an indication to the test missile to cease tracking the second missile target type and return to an off-axis position;determine, based on one or more received signals from the test missile, whether the test missile loses acquisition of the second missile target type and returns to an off-axis position, wherein: if the test missile loses acquisition of the second missile target type and returns to an off-axis position, the caging capability test logic provides an indication that the caging capability test completed successfully; andotherwise the caging capability test logic provides an indication that the caging capability test has failed. 15. A method in an electronic device comprising: determining that a plurality of first stage tests to be executed on a test missile do not require a missile target or high pressure gas for testing of the test missile;concurrently executing the plurality of first stage tests on the test missile by determining when data will be made available for each of the plurality of first stage tests and executing a portion of the plurality of first stage tests that may be completed before the data is made available for each of the plurality of first stage tests;determining that a plurality of second stage tests to be executed on the test missile require a first type missile target and high pressure gas for testing of the test missile;concurrently executing the plurality of second stage tests on the test missile by determining when data will be made available for each of the plurality of second stage tests and executing a portion of the plurality of second stage tests that may be completed before the data is made available for each of the plurality of second stage tests;determining that a plurality of third stage tests to be executed on the test missile require a second type missile target for testing of the test missile; andconcurrently executing the plurality of third stage tests on the test missile by determining when data will be made available for each of the plurality of third stage tests and executing a portion of the plurality of third stage tests that may be completed before the data is made available for each of the plurality of third stage tests; andproviding an indication of whether the plurality of first stage tests, plurality of second stage tests, and plurality of third stage tests completed successfully. 16. The method of claim 15 wherein concurrently executing the plurality of first stage tests on the test missile comprises: providing the test missile with a first test signal;determining a gyro spin frequency of a gyro of the test missile based on a first received signal from the test missile after a first minimum threshold amount of time;determining a gyro spin time of the gyro of the test missile based on the first received signal from the test missile; anddetermining whether the determined gyro spin frequency is within a gyro spin frequency range and whether the determined gyro spin time falls within a gyro spin time range, wherein: if the determined gyro spin frequency is within the gyro spin frequency range and the determined gyro spin time is within the gyro spin time range, providing an indication that a gyro spin test completed successfully; andif the determined gyro spin frequency is not within the gyro spin frequency range or the determined gyro spin time is not within the gyro spin time range providing an indication that the gyro spin test has failed. 17. The method of claim 16 wherein concurrently executing the plurality of first stage tests on the test missile comprises: determining a gyro spin frequency of the gyro of the test missile based on a second received signal from the test missile after a second minimum threshold amount of time; anddetermining whether the determined gyro spin frequency is within a gyro spin frequency range, wherein: if the determined gyro spin frequency is within the gyro spin frequency range, providing an indication that a gyro spin frequency test completed successfully; andif the determined gyro spin frequency is not within the gyro spin frequency range, providing an indication that the gyro spin frequency test has failed. 18. The method of claim 17 wherein concurrently executing the plurality of first stage tests on the test missile comprises determining a gyro spin direction of the gyro of the test missile. 19. The method of claim 15 wherein concurrently executing the plurality of first stage tests on the test missile comprises: determining whether a digital word in signal occurred based on a first received signal from the test missile after a minimum threshold amount of time;determining whether a digital word out signal occurred based on a second received signal from the test missile after the minimum threshold amount of time; wherein: if the digital word in signal occurred and the digital word out signal occurred, providing an indication that the digital word sensing test completed successfully; andotherwise providing an indication that the digital word sensing test has failed. 20. The method of claim 15 wherein concurrently executing the plurality of first stage tests on the test missile comprises: periodically determining an audio out signal level based on a received audio out signal from the test missile over a period of time; anddetermining a number of times that the measured audio out signal level exceeds an audio out signal level threshold, wherein: if the number of times that the measured audio out signal level exceeds the audio out signal level threshold is greater than a maximum threshold, providing an indication that an audio out signal level test completed successfully; andotherwise providing an indication that the audio out signal level test has failed. 21. The method of claim 15 wherein concurrently executing the plurality of first stage tests on the test missile comprises: determining an operating current based on a received signal from the test missile after a minimum threshold amount of time;determining whether the operating current is within an operating current range; anddetermining a number of how many of the plurality of first stage tests are completed, wherein: if the operating current is not within the operating current range or a determined number of the plurality of fist stage tests are not completed, providing an indication that an operating current test has failed; andif the operating current is within the operating current range and the determined number of the plurality of first stage tests are completed, providing an indication that the operating current test completed successfully. 22. The method of claim 15 wherein concurrently executing the plurality of second stage tests on the test missile comprises: determining a gas flow rate based on a received signal from the test missile after a minimum threshold amount of time; anddetermining whether the gas flow rate is within a gas flow rate range, wherein: if the gas flow rate is within the gas flow rate range, providing an indication that a gas flow rate test completed successfully; andotherwise providing an indication that the gas flow rate test has failed. 23. The method of claim 15 wherein concurrently executing the plurality of second stage tests on the test missile comprises determining whether the test missile acquires tracking of the first type missile target before a maximum threshold amount of time based on a first received signal from the test missile, wherein: if the test missile acquires tracking of the first type missile target before the maximum threshold amount of time, providing an indication that a functional cooldown test completed successfully; andotherwise providing an indication that the functional cooldown test has failed. 24. The method of claim 23 wherein concurrently executing the plurality of second stage tests on the test missile comprises determining whether the test missile maintains acquisition of the first type missile target for a minimum threshold amount of time based on a second received signal from the test missile, wherein: if the test missile maintains acquisition of the first type missile target for the minimum threshold amount of time, providing an indication that a tracking sensitivity test completed successfully; andotherwise providing an indication that the tracking sensitivity test has failed. 25. The method of claim 15 wherein concurrently executing the plurality of third stage tests on the test missile comprises determining a positive quiescent current level of the test missile while the test missile is tracking the second missile type target based on a received signal from the test missile, wherein: if the positive quiescent current level is within a positive quiescent current range, providing an indication that a positive quiescent current test completed successfully; andotherwise providing an indication that the positive quiescent current test has failed. 26. The method of claim 15 wherein concurrently executing the plurality of third stage tests on the test missile comprises determining a negative quiescent current level of the test missile while the test missile is tracking the second missile type target based on a received signal from the test missile, wherein: if the negative quiescent current level is within a negative quiescent current range, providing an indication that the negative quiescent current test completed successfully; andotherwise providing an indication that the negative quiescent current test has failed. 27. The method of claim 15 wherein concurrently executing the plurality of third stage tests on the test missile comprises determining whether the test missile maintains acquisition of the second type missile target for a minimum threshold amount of time based on a received signal from the test missile, wherein: if the test missile maintains acquisition of the second type missile target for the minimum threshold amount of time, providing an indication that a clockwise tracking capability test completed successfully; andotherwise providing an indication that the clockwise tracking capability test has failed. 28. The method of claim 15 wherein concurrently executing the plurality of third stage tests on the test missile comprises: providing an indication to the test missile to cease tracking the second missile target type and return to an off-axis position; anddetermining, based on one or more received signals from the test missile, whether the test missile loses acquisition of the second missile target type and returns to an off-axis position, wherein: if the test missile loses acquisition of the second missile target type and returns to an off-axis position, providing an indication that the caging capability test completed successfully; andotherwise providing an indication that the caging capability test has failed. 29. A test system comprising: a device under test;an electronic device operably coupled to the device under test and comprising: first stage concurrent determination test logic configured to: determine that a plurality of first stage tests to be executed on the device under test require a first test environment;concurrently execute the plurality of first stage tests on the device under test by determining when data will be made available for each of the plurality of first stage tests and executing a portion of the plurality of first stage tests that may be completed before the data is made available for each of the plurality of first stage tests; andprovide an indication of whether the plurality of first stage tests completed successfully;second stage concurrent determination test logic configured to: determine that a plurality of second stage tests to be executed on the device under test require a second test environment;concurrently execute the plurality of second stage tests on the device under test by determining when data will be made available for each of the plurality of second stage tests and executing a portion of the plurality of second stage tests that may be completed before the data is made available for each of the plurality of second stage tests; andprovide an indication of whether the plurality of second stage tests completed successfully; andthird stage concurrent determination test logic configured to: determine that a plurality of third stage tests to be executed on the device under test require a third test environment;concurrently execute the plurality of third stage tests on the device under test by determining when data will be made available for each of the plurality of third stage tests and executing a portion of the plurality of third stage tests that may be completed before the data is made available for each of the plurality of third stage tests; andprovide an indication of whether the plurality of third stage tests completed successfully. 30. The test system of claim 29 wherein the device under test is a missile, wherein the first test environment does not require a missile target or high pressure gas for the testing of the test missile, wherein the second test environment does require a first type missile target and high pressure gas for the testing of the test missile, and the third test environment requires a second type missile target for the testing of the test missile.
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