[논문]DC-Link Voltage Balance Control Using Fourth-Phase for 3-Phase 3-Level NPC PWM Converters with Common-Mode Voltage Reduction Technique

Jung, Jun-Hyung; Park, Jung-Hoon; Kim, Jang-Mok; Son, Yung-Deug

doi:10.6113/jpe.2019.19.1.108

[해외논문] DC-Link Voltage Balance Control Using Fourth-Phase for 3-Phase 3-Level NPC PWM Converters with Common-Mode Voltage Reduction Technique 원문보기

Journal of power electronics, v.19 no.1, 2019년, pp.108 - 118

Jung, Jun-Hyung (Dept. of Electrical and Computer Eng., Pusan National University) , Park, Jung-Hoon (Dept. of Electrical and Computer Eng., Pusan National University) , Kim, Jang-Mok (Dept. of Electrical and Computer Eng., Pusan National University) , Son, Yung-Deug (Dept. of Mechanical Facility Control Eng., Korea University of Technology and Education)

Abstract ▼ AI-Helper

This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

주제어

표/그림 (19)

그림 Fig. 1. Circuit configuration of a three-phase three-level NPC PWM converter.
그림 Fig. 2. Space vector diagram of MVS PWM.
표 TABLE I AMPLITUDE OF THE COMMON-MODE VOLTAGE ACCORDING TO THE SWITCHING STATES
그림 Fig. 3. Switching sequence of MVS PWM (Ex: Sector 5).
그림 Fig. 4. DC-link equivalent circuit of a three-phase NPC converter with a constant load.
표 TABLE II DIVISION OF SECTORS AND SWITCHING SEQUENCES
그림 Fig. 5. State of the three-phase currents according to each sector.
그림 Fig. 6. DC-link voltages of the upper and lower capacitor in each sector of the MVS PWM.
그림 Fig. 7. Grid-connected three-phase three-level NPC converter with a fourth-phase for balancing the DC-link voltage.
그림 Fig. 8. Dipolar modulation for fourth-phase operation.
그림 Fig. 9. DC-link voltage balancing control system with a PDcontroller.
표 TABLE III ESTIMATED IO__FF FOR FEEDFORWARD COMPENSATION ACCORDING TO THE SECTORS
그림 Fig. 10. Grid-connected three-level NPC PWM converter with MVS PWM and a fourth-phase with a DC-link voltage balancing controller.
그림 Fig. 11. Fourth-phase three-level NPC converter module prototype.
표 TABLE IV CONDITIONS OF THE EXPERIMENT
그림 Fig. 12. Common-mode voltage and three-phase voltage output:(a) SVPWM; (b) MVS PWM.
그림 Fig. 13. Input phase current waveform and FFT analysis results under the load condition of 5kW: (a) SVPWM; (b) MVS PWM.
그림 Fig. 14. Experimental results of DC-link voltage balancing: (a)Step control waveform before and after control; (b) Without the controller; (c) With the controller.
그림 Fig. 15. Experimental results under a step load change: (a)Without the controller; (b) With the controller.

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문제 정의

The EMI noise caused by CMV is conducted or radiated into other electric systems, which results in malfunctions of nearby equipment. For this reason, research has been conducted to reduce the EMI noise emitted from the power conversion systems [5]-[12].

가설 설정

If the controller is not applied, as shown in Fig. 15(a), the difference between V_{DC_upper} and V_{DC_lower} becomes larger due to the change of the load. Moreover, the ripple of the two voltages increases.
On the other hand, after applying the proposed controller, as shown in Fig. 15(b), the average difference between the two voltages is kept close to zero. Although the voltage ripple increases slightly, it is suppressed more than the result shown in Fig.
Before applying the controller, as presented in Fig. 14(b), the upper and lower DC voltage are separated up to about 5V and the ripple for each of the voltages is about 2V. After applying the fourth-phase and the proposed controller, the two DC voltages V_{DC_upper} and V_{DC_lower} are controlled to an average of 350V, which corresponds to half of the DC-link voltage.

제안 방법

However, it does not have a significant effect. Since MVS PWM is applied to the three-level NPC converter in this paper, a detailed analysis of the effect of MVS PWM on the voltage imbalance should be conducted for effective control of the DC-link voltage imbalance. Fig.
Therefore, this paper proposes a balance controller for the DC-link voltage using the fourth-phase of a three-phase three-level NPC PWM converter with MVS PWM for the common-mode voltage reduction. The effect of MVS PWM on the DC-link of the three-level NPC converter is analyzed and a PD controller is designed from the modeling of the neutral point of the DC-link including the fourth-phase.
This paper proposed a DC-link balance controller with a fourth-phase for three-phase three-level NPC converters using MVS PWM. The proposed controller is based on the PD controller which has a fast response to variable errors.

성능/효과

To solve the imbalance problem, the proposed PD controller was designed from an equivalent circuit of the DC-link and applied to the fourth-phase. Experimental results show that the average differe nce between the upper and lower capacitor voltage was controlled to almost zero and that the voltage ripple was suppressed by about 30%.

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