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NTIS 바로가기IEEE access : practical research, open solutions, v.8, 2020년, pp.185209 - 185217
Hong, Soonyoung (Department of Information and Communication Engineering, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea) , George, Arup K. (Department of Information and Communication Engineering, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea) , Im, Donggu (Department of Electronic Engineering, Jeonbuk National University, Jeonju-si, South Korea) , Je, Minkyu (School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea) , Lee, Junghyup (Department of Information and Communication Engineering, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea)
This paper presents an ultra-low power, low cost demodulator for gaussian frequency shift keying (GFSK) receivers that use low intermediate frequencies (IF). The demodulator employs a direct IF to digital data conversion scheme by using an injection-locked ring oscillator (ILRO) with a 1-bit flip-fl...
Silva Pereira, M., Caldinhas Vaz, J., Azeredo Leme, C., de Sousa, J. T., Costa Freire, J..
A 170
RF Microelectronics razavi 2011 544
Ho, Cheng-Ru, Chen, Mike Shuo-Wei. A Fractional-N DPLL With Calibration-Free Multi-Phase Injection-Locked TDC and Adaptive Single-Tone Spur Cancellation Scheme. IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. I, Regular papers, vol.63, no.8, 1111-1122.
Wei Deng, Dongsheng Yang, Ueno, Tomohiro, Siriburanon, Teerachot, Kondo, Satoshi, Okada, Kenichi, Matsuzawa, Akira. A Fully Synthesizable All-Digital PLL With Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-Resolution Digital Varactor Using Gated Edge Injection Technique. IEEE journal of solid-state circuits, vol.50, no.1, 68-80.
Liu, Hanli, Sun, Zheng, Tang, Dexian, Huang, Hongye, Kaneko, Tohru, Chen, Zhijie, Deng, Wei, Wu, Rui, Okada, Kenichi. A DPLL-Centric Bluetooth Low-Energy Transceiver With a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65-nm CMOS. IEEE journal of solid-state circuits, vol.53, no.12, 3672-3687.
IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers A 3.5 mm$\times3.8$ mm Crystal-Less MICS Transceiver Featuring Coverages of ±160ppm Carrier Frequency Offset and 4.8-VSWR Antenna Impedance for Insertable Smart Pills song 2020 474
IEEE Trans Circuits Syst I Reg Papers Ultra low Power Injection-Locked GFSK Receiver for Short-Range Wireless Systems ye 2012 10.1109/TCSII.2012.2220695 59 706
Yadong Yin, Yuepeng Yan, Chenjun Wei, Shaodan Yang. A Low-Power Low-Cost GFSK Demodulator With a Robust Frequency Offset Tolerance. IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. II, Express briefs, vol.61, no.9, 696-700.
Proc IEEE Asian Solid State Circuits Conf (A-SSCC) A 0.5 V GFSK $200\times03$ BC;W limiter/demodulator with bulk-driven technique for low-IF bluetooth lai 2012 321
Kuo, Feng-Wei, Binsfeld Ferreira, Sandro, Chen, Huan-Neng Ron, Cho, Lan-Chou, Jou, Chewn-Pu, Hsueh, Fu-Lung, Madadi, Iman, Tohidian, Massoud, Shahmohammadi, Mina, Babaie, Masoud, Staszewski, Robert Bogdan. A Bluetooth Low-Energy Transceiver With 3.7-mW All-Digital Transmitter, 2.75-mW High-IF Discrete-Time Receiver, and TX/RX Switchable On-Chip Matching Network. IEEE journal of solid-state circuits, vol.52, no.4, 1144-1162.
Masuch, J., Delgado-Restituto, M..
A 190-
Proc 34th Eur Solid-State Circuits Conf An ultra low power GFSK demodulator for wireless body area network han 2008 434
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