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[해외논문] Exploiting defective RRAM array as synapses of HTM spatial pooler with boost-factor adjustment scheme for defect-tolerant neuromorphic systems 원문보기

Scientific reports, v.10, 2020년, pp.11703 -   

Woo, Jiyong (ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129 South Korea) ,  Van Nguyen, Tien (School of Electrical Engineering, Kookmin University, Seoul, 02707 South Korea) ,  Kim, Jeong Hun (ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129 South Korea) ,  Im, Jong-Pil (ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129 South Korea) ,  Im, Solyee (ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129 South Korea) ,  Kim, Yeriaron (ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129 South Korea) ,  Min, Kyeong-Sik (School of Electrical Engineering, Kookmin University, Seoul, 02707 South Korea) ,  Moon, Seung Eon (ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129 South Korea)

Abstract AI-Helper 아이콘AI-Helper

A crossbar array architecture employing resistive switching memory (RRAM) as a synaptic element accelerates vector–matrix multiplication in a parallel fashion, enabling energy-efficient pattern recognition. To implement the function of the synapse in the RRAM, multilevel resistance states are...

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