[논문]Logic Device Based on Skyrmion Annihilation

Song, Moojune; Park, Min Gyu; Ko, San; Jang, Sung Kyu; Je, Minkyu; Kim, Kab-Jin

doi:10.1109/ted.2021.3055157

[해외논문] Logic Device Based on Skyrmion Annihilation

IEEE transactions on electron devices, v.68 no.4, 2021년, pp.1939 - 1943

Song, Moojune (Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea) , Park, Min Gyu (Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea) , Ko, San (Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea) , Jang, Sung Kyu (Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea) , Je, Minkyu (Korea Advanced Institute of Science and Technology (KAIST), School of Electrical Engineering, Daejeon, South Korea) , Kim, Kab-Jin (Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea)

Abstract ▼ AI-Helper

Skyrmion-based devices are an attractive candidate for nonvolatile memory and low-power computation. In a real device, however, skyrmions easily annihilate at device edges, which hampers device applications. Here, we present a novel skyrmion-based logic device, which takes advantage of the skyrmion annihilation (SA) and increases the efficiency of logic operation. An SA half adder (HA) is implemented in a ferromagnet/heavy metal nanotrack by introducing a geometric notch that annihilates the skyrmion. In addition, full adder and ${n}$-bit SA ripple-carry adder are demonstrated by directly cascading the SA HAs. The prototype of a 32-bit SA ripple-carry adder consumes energy as low as 0.62 pJ per each operation, which is only 18% of the previously proposed skyrmion adder. Our SA logic gate can, therefore, be a promising candidate for the beyond-CMOS logic device.

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DOI : 10.1109/TED.2021.3055157
IEEE : 저널 > 논문

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