참고문헌 (30)

1. James, Alex, Krestinskaya, Olga, Maan, Akshay. Recursive Threshold Logic—A Bioinspired Reconfigurable Dynamic Logic System With Crossbar Arrays. IEEE transactions on biomedical circuits and systems, vol.14, no.6, 1311-1322.

   상세보기

2. Avedillo, M.J., Quintana, J.M., Rueda, A., Jimenez, E.. Low-power CMOS threshold-logic gate. Electronics letters, vol.31, no.25, 2157-2159.

   상세보기

3. J.Yang N.Kulkarni S.Yu S.Vrudhula inProc. of the 2014 IEEE/ACM Int. Symp. on Nanoscale Architectures Association for Computing Machinery New York NY2014 pp.39-44. 

4. Ozdemir, H., Kepkep, A., Pamir, B., Leblebici, Y., Cilingiroglu, U.. A capacitive threshold-logic gate. IEEE journal of solid-state circuits, vol.31, no.8, 1141-1150.

   상세보기

5. Kulkarni, Niranjan, Yang, Jinghua, Seo, Jae-Sun, Vrudhula, Sarma. Reducing Power, Leakage, and Area of Standard-Cell ASICs Using Threshold Logic Flip-Flops. IEEE transactions on very large scale integration (VLSI) systems, vol.24, no.9, 2873-2886.

   상세보기

6. Dara, Chandra Babu, Haniotakis, Themistoklis, Tragoudas, Spyros. Delay Analysis for Current Mode Threshold Logic Gate Designs. IEEE transactions on very large scale integration (VLSI) systems, vol.25, no.3, 1063-1071.

   상세보기

7. Celinski, P., Lopez, J.F., Al-Sarawi, S., Abbott, D.. Low power, high speed, charge recycling CMOS threshold logic gate. Electronics letters, vol.37, no.17, 1067-1069.

   상세보기

8. IEEE Circuits and Systems Society Information. IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. II, Express briefs, vol.65, no.12, C3-C3.

   상세보기

9. Beiu, V., Quintana, J.M., Avedillo, M.J.. VLSI implementations of threshold logic-a comprehensive survey. IEEE transactions on neural networks, vol.14, no.5, 1217-1243.

   상세보기

10. Maan, Akshay Kumar, Kumar, Dinesh Sasi, Sugathan, Sherin, James, Alex Pappachen. Memristive Threshold Logic Circuit Design of Fast Moving Object Detection. IEEE transactions on very large scale integration (VLSI) systems, vol.23, no.10, 2337-2341.

    상세보기

11. IEEE Trans. Neural Networks Learn. Syst. Maan A. K. 8 28 2016 

12. T.Tran A.Rothenbuhler E.Smith V.Saxena K. A.Campbell inProc. IEEE Subthreshold Microelectronics Conf. IEEE Piscataway NJ2012 pp.1-3. 

13. James, Alex Pappachen, Francis, Linu Rose V. J., Kumar, Dinesh S.. Resistive Threshold Logic. IEEE transactions on very large scale integration (VLSI) systems, vol.22, no.1, 190-195.

    상세보기

14. D.Chabi W.Zhao D.Querlioz J. O.Klein inProc. IEEE/ACM Int. Symp. Nanoscale Architectures Association for Computing Machinery New York NY2011 pp.137-143. 

15. J.Rajendran H.Manem R.Karri G. S.Rose inProc. IEEE/ACM Int. Symp. Nanoscale Architectures Association for Computing Machinery New York NY2010 pp.5-10. 

16. Sulymenko, Olga, Prokopenko, Oleksandr, Lisenkov, Ivan, Åkerman, Johan, Tyberkevych, Vasyl, Slavin, Andrei N., Khymyn, Roman. Ultra-fast logic devices using artificial “neurons” based on antiferromagnetic pulse generators. Journal of applied physics, vol.124, no.15, 152115-.

    상세보기

17. Duan, Qingxi, Jing, Zhaokun, Zou, Xiaolong, Wang, Yanghao, Yang, Ke, Zhang, Teng, Wu, Si, Huang, Ru, Yang, Yuchao. Spiking neurons with spatiotemporal dynamics and gain modulation for monolithically integrated memristive neural networks. Nature communications, vol.11, no.1, 3399-.

    상세보기

18. IEEE Electron Device Lett. Han J.‐W. 9 39 2018 

19. IEEE Electron Device Letters. IEEE electron device letters : a publication of the IEEE Electron Devices Society, vol.41, no.12, C2-C2.

    상세보기

20. Yin, Xiaogen, Yang, H., Xie, L., Ai, X. Z., Zhang, Y. B., Jia, K. P., Wu, Z. H., Ma, X. L., Zhang, Q. Z., Mao, S. J., Xiang, J. J., Zhang, Yongkui, Gao, J. F., He, X. B., Bai, G. B., Lu, Y. H., Zhou, N., Kong, Z. Z., Zhang, Y., Zhao, J., Ma, S. S., Xuan, Z. H., Zhu, Huilong, Li, Y. Y., Li, L., Zhang, Q. H., Han, J. H., Chen, R. L., Qu, Y., Yang, T., Luo, J., Li, J. F., Yin, H. X., Wang, G. L., Radamson, H., Zhao, C., Wang, W. W., Ye, T. C., Li, J. J., Du, A.Y., Li, C., Zhao, L. H., Huang, W. X.. Vertical Sandwich Gate-All-Around Field-Effect Transistors With Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation. IEEE electron device letters : a publication of the IEEE Electron Devices Society, vol.41, no.1, 8-11.

    상세보기

21. Han, Joon-Kyu, Geum, Dae-Myeong, Lee, Mun-Woo, Yu, Ji-Man, Kim, Seong Kwang, Kim, Sanghyeon, Choi, Yang-Kyu. Bioinspired Photoresponsive Single Transistor Neuron for a Neuromorphic Visual System. Nano letters : a journal dedicated to nanoscience and nanotechnology, vol.20, no.12, 8781-8788.

    상세보기

22. Schöning, Michael J., Poghossian, Arshak. Recent advances in biologically sensitive field-effect transistors (BioFETs). The Analyst : An International Journal of Analytical and Bioanalytical Science, vol.127, no.9, 1137-1151.

    상세보기

23. Schöning, Michael J., Poghossian, Arshak. Bio FEDs (Field-Effect Devices): State-of-the-Art and New Directions. Electroanalysis, vol.18, no.19, 1893-1900.

    상세보기

24. IEEE Electron Device Lett. Chen C.‐E. D. 12 9 1988 

25. J. Appl. Phys. Parihar M. 18 113 2013 

26. Han, Joon-Kyu, Yun, Gyeong-Jun, Han, Seong-Joo, Yu, Ji-Man, Choi, Yang-Kyu. One Biristor-Two Transistor (1B2T) Neuron With Reduced Output Voltage and Pulsewidth for Energy-Efficient Neuromorphic Hardware. IEEE transactions on electron devices, vol.68, no.1, 430-433.

    상세보기

27. IEEE J. Solid‐State Circuits Wang J. 7 29 1994 

28. A. K.Maan A. P.James inProc. IEEE Asia Pacific Conf. Circuits & Systems IEEE Piscataway NJ2016 pp.376-379. 

29. Maan, Akshay Kumar, Kumar, Dinesh S., James, Alex Pappachen. Memristive Threshold Logic Face Recognition. Procedia computer science, vol.41, 98-103.

    상세보기

30. Kim, Sungho, Choi, Bongsik, Lim, Meehyun, Kim, Yeamin, Kim, Hee‐Dong, Choi, Sung‐Jin. Synaptic Device Network Architecture with Feature Extraction for Unsupervised Image Classification. Small, vol.14, no.32, 1800521-.

    상세보기

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