최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기Journal of sensors, v.2021, 2021년, pp.1 - 8
Li, Peng (Digital Grid Research Institute, Artificial Intelligence and Chip Application Research Department, CSG, Guangzhou 510670, China) , Xi, Wei (Digital Grid Research Institute, Artificial Intelligence and Chip Application Research Department, CSG, Guangzhou 510670, China) , Zeng, Xiangjun (School of Electrical and Information Engineering, Changsha University of Science and Technology, Changsha 410114, China) , Li, Xiaobo (Digital Grid Research Institute, Artificial Intelligence and Chip Application Research Department, CSG, Guangzhou 510670, China) , Zheng, Dandan (Hangzhou Sec-Chip Technology Co., Ltd., Hangzhou 310012, China) , Ahmad, Harith
This paper introduces a small-area, low-power delta-sigma DAC that can support power line carrier communication. In order to achieve the oversampling ratio of 128, a three-stage cascaded half-band filter is utilized. An optimized sturdy MASH
CMOS VLSI design: a circuits and systems perspective N. H. E. Weste 2005
Lee, Kyehyung, Meng, Qingdong, Sugimoto, Tetsuro, Hamashita, Koichi, Takasuka, Kaoru, Takeuchi, Seiji, Moon, Un-Ku, Temes, Gabor C.. A 0.8 V, 2.6 mW, 88 dB Dual-Channel Audio Delta-Sigma D/A Converter With Headphone Driver. IEEE journal of solid-state circuits, vol.44, no.3, 916-927.
Understanding delta-sigma data converters R. Schreier 2005
Uchimura, K., Hayashi, T., Kimura, T., Iwata, A.. Oversampling A-to-D and D-to-A converters with multistage noise shaping modulators. IEEE transactions on acoustics, speech, and signal processing, vol.36, no.12, 1899-1905.
Electronics Letters N. Maghari 42 22 1269 2008 10.1049/el:20062718 Sturdy MASH D-S modulator
IEEE International Symposium on Intelligent Signal Processing and Communication Systems C. Caduff 2000 A novel MASH-kind third-order ΣΔ converter structure
Annovazzi, M., Colonna, V., Gandolfi, G., Stefani, F., Baschirotto, A.. A low-power 98-dB multibit audio DAC in a standard 3.3-V 0.35-μm CMOS technology. IEEE journal of solid-state circuits, vol.37, no.7, 825-834.
Fujimori, I., Nogi, A., Sugimoto, T.. A multibit delta-sigma audio DAC with 120-dB dynamic range. IEEE journal of solid-state circuits, vol.35, no.8, 1066-1073.
Schreier, R., Zhang, B.. Noise-shaped multibit D/A convertor employing unit elements. Electronics letters, vol.31, no.20, 1712-1713.
O'Brien, Vincent, Mullane, Brendan. High Order Mismatch Shaping for Low Oversampling Rates. IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. II, Express briefs, vol.67, no.1, 42-46.
Nan Sun. High-Order Mismatch-Shaping in Multibit DACs. IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. II, Express briefs, vol.58, no.6, 346-350.
Welz, J., Galton, I., Fogleman, E.. Simplified logic for first-order and second-order mismatch-shaping digital-to-analog converters. IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. II, Analog and digital signal processing, vol.48, no.11, 1014-1027.
IEEE Journal of Solid-State Circuits I. Fujimori 33 12 1863 2002 10.1109/4.735525 A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter
*원문 PDF 파일 및 링크정보가 존재하지 않을 경우 KISTI DDS 시스템에서 제공하는 원문복사서비스를 사용할 수 있습니다.
오픈액세스 학술지에 출판된 논문
※ AI-Helper는 부적절한 답변을 할 수 있습니다.