[논문]Low-Noise Chopper Amplifier Using Lateral PNP Input Stage With Automatic Base Current Cancellation

Kim, Hyungseup; Kwon, Yongsu; You, Donggeun; Choi, Hyun-Woong; Kim, Seong Hyun; Heo, Hyunwoo; Kim, Choul-Young; Lee, Hi-Deok; Ko, Hyoungho

doi:10.1109/tcsii.2021.3063358

[해외논문] Low-Noise Chopper Amplifier Using Lateral PNP Input Stage With Automatic Base Current Cancellation

IEEE transactions on circuits and systems. a publication of the IEEE Circuits and Systems Society. II, Express briefs, v.68 no.7, 2021년, pp.2297 - 2301

Kim, Hyungseup (Chungnam National University, Daejeon, South Korea) , Kwon, Yongsu (Chungnam National University, Daejeon, South Korea) , You, Donggeun (Chungnam National University, Daejeon, South Korea) , Choi, Hyun-Woong (Chungnam National University, Daejeon, South Korea) , Kim, Seong Hyun (Chungnam National University, Daejeon, South Korea) , Heo, Hyunwoo (Chungnam National University, Daejeon, South Korea) , Kim, Choul-Young (Chungnam National University, Daejeon, South Korea) , Lee, Hi-Deok (Chungnam National University, Daejeon, South Korea) , Ko, Hyoungho (Chungnam National University, Daejeon, South Korea)

Abstract ▼ AI-Helper

This brief presents a low-noise chopper amplifier that uses a lateral PNP input stage with automatic base current cancellation in complementary metal–oxide–semiconductor (CMOS) process. A bipolar junction transistor (BJT) input stage can achieve lower noise level than the MOS transistor input stage, but its base current causes low DC input impedance. To enhance the DC input impedance of the BJT input stage, an automatic base current cancellation circuit is implemented using a 10-bit current digital-to-analog converter (DAC) and a successive approximation register (SAR) logic. The output current of the DAC tracks the base current of the BJT input stage using a binary search operation of the SAR logic, and the current DAC provides a cancellation current to the base of the BJT input stage to cancel the input base current. The amplifier is implemented in 0.18- $\mu \text{m}$ CMOS process, and the proposed amplifier occupies an active area of 0.297 mm2. The current consumption of the chopper amplifier is 146 $\mu \text{A}$ with 3.3 V supply voltage. The input referred noise of the chopper amplifier is 5.53 nV $/\surd $Hz. The input bias current of the proposed amplifier with lateral PNP input stage implementing automatic base current cancellation is 0.391 nA.

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DOI : 10.1109/TCSII.2021.3063358
IEEE : 저널 > 논문

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